Change in coreboot[master]: soc/intel/cannonlake: Enable wake from USB in S4

[Patrick Rudolph (Code Review)]

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/49224 )

Change subject: soc/intel/cannonlake: Enable wake from USB in S4
......................................................................

soc/intel/cannonlake: Enable wake from USB in S4

The xHCI controller supports waking the system from S1-S4.
Thus specify that the deepest sleep state is S4 in _PRW.

Tested on Prodrive/hermes. The board now wakes from S4 as well by
pressing a key on the USB keyboard.

Change-Id: I0bb266e70ee6b4eb8922671b7d0078db0d29a1da
Signed-off-by: Patrick Rudolph 
---
M src/soc/intel/cannonlake/acpi/xhci.asl
1 file changed, 4 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/49224/1

diff --git a/src/soc/intel/cannonlake/acpi/xhci.asl b/src/soc/intel/cannonlake/acpi/xhci.asl
index 7d89665..50c0cb8 100644
--- a/src/soc/intel/cannonlake/acpi/xhci.asl
+++ b/src/soc/intel/cannonlake/acpi/xhci.asl
@@ -67,7 +67,7 @@
 {
    Name (_ADR, 0x00140000)

-	Name (_PRW, Package () { GPE0_PME_B0, 3 })
+	Name (_PRW, Package () { GPE0_PME_B0, 4 })

Method (_DSW, 3)
    {
@@ -79,6 +79,9 @@
    Name (_S0W, 3)	/* D3 can wake device in S0 */
    Name (_S3W, 3)	/* D3 can wake system from S3 */

+	Name (_S4D, 3)	/* D3 supported in S4 */
+	Name (_S4W, 3)	/* D3 can wake system from S4 */
+
    OperationRegion (XPRT, PCI_Config, 0x00, 0x100)
    Field (XPRT, AnyAcc, NoLock, Preserve)
    {