Attention is currently required from: Joey Peng, Kevin Chang, Paul Menzel, YH Lin.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60341 )
Change subject: mb/google/brya/var/taeko: Run-time probe for NVMe SSD and MMC
......................................................................
Patch Set 13: Code-Review+2
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/60341/comment/25ed075b_ddaa800f
PS13, Line 9: Taeko will use two PCIE port signals with one slot, one CLK and one
mention this is for the next build phase (so we understand why it won't apply to taeko4es)
https://review.coreboot.org/c/coreboot/+/60341/comment/b2ef7752_d31e9137
PS13, Line 14: Test on takeo trace in FSP log can find the correct root ports have
: been set depending on CBI.
```
Build FSP with debug output enabled, and observe the correct root
ports being initialized depending on the FW_CONFIG values for BOOT_EMMC and BOOT_NVME.
```
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