Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30873 )
Change subject: [RFC] cpu/intel/car: Use symbols for CAR MTRR setup ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/30873/4/src/soc/intel/common/block/... File src/soc/intel/common/block/cpu/car/cache_as_ram.S:
https://review.coreboot.org/c/coreboot/+/30873/4/src/soc/intel/common/block/... PS4, Line 109: #if 0
Do we need two MTRRs? Don't we get the same cacheline utilisation by limiting the load to _car_mtrr_size below.
Probably not, as long as the CAR region with cachelines utilized is large enough to fit the programs. Unless FSP-M is supposed to be independent of FSP-T so I would guess that it does not care about how CAR is set up as long as it's in the right place?
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Arthur Heymans (Code Review)