Change in coreboot[master]: console,soc: print wr protect status

[Sridhar Siricilla (Code Review)]

Sridhar Siricilla has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48342 )

Change subject: console,soc: print wr protect status
......................................................................

console,soc: print wr protect status

Signed-off-by: Sridhar Siricilla 
Change-Id: I140fcee714ca550d403be1e0042e9f729f4417a5
---
M src/console/init.c
M src/soc/intel/common/block/cse/cse_lite.c
2 files changed, 13 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/48342/1

diff --git a/src/console/init.c b/src/console/init.c
index c598077..9cb467c 100644
--- a/src/console/init.c
+++ b/src/console/init.c
@@ -7,6 +7,8 @@
 #include <device/pci.h>
 #include <option.h>
 #include <version.h>
+#include <spi_flash.h>
+

#define FIRST_CONSOLE (ENV_BOOTBLOCK || (CONFIG(NO_BOOTBLOCK_CONSOLE) && ENV_ROMSTAGE))

diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c
index 8fd87b8..d77241a 100644
--- a/src/soc/intel/common/block/cse/cse_lite.c
+++ b/src/soc/intel/common/block/cse/cse_lite.c
@@ -10,6 +10,7 @@
 #include <security/vboot/vboot_common.h>
 #include <security/vboot/misc.h>
 #include <soc/intel/common/reset.h>
+#include <spi_flash.h>

/* Converts bp index to boot partition string */
 #define GET_BP_STR(bp_index) (bp_index ? "RW" : "RO")
@@ -373,7 +374,12 @@
 /* Set the CSE's next boot partition and issues system reset */
 static bool cse_set_and_boot_from_next_bp(enum boot_partition_id bp)
 {
-	if (!cse_set_next_boot_partition(bp))
+ {
+	 u8 spi_sts;
+	 spi_flash_status(boot_device_spi_flash(), &spi_sts);
+	 printk(BIOS_DEBUG, "SPI_STATUS: 0x%x\n", spi_sts);
+
+	 if (!cse_set_next_boot_partition(bp))
    	return false;

/* Allow the board to perform a reset for CSE RO<->RW jump */
@@ -775,6 +781,10 @@
 {
    static struct get_bp_info_rsp cse_bp_info;

+	u8 spi_sts;
+	spi_flash_status(boot_device_spi_flash(), &spi_sts);
+	printk(BIOS_DEBUG, "SPI_STATUS: 0x%x\n", spi_sts);
+
    if (vboot_recovery_mode_enabled()) {
    	printk(BIOS_DEBUG, "cse_lite: Skip switching to RW in the recovery path\n");
    	return;

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48342 )

Change subject: console,soc: print wr protect status
......................................................................

Patch Set 1:

(3 comments)

https://review.coreboot.org/c/coreboot/+/48342/1/src/soc/intel/common/block/... 
File src/soc/intel/common/block/cse/cse_lite.c:

https://review.coreboot.org/c/coreboot/+/48342/1/src/soc/intel/common/block/... 
PS1, Line 377:  {
please, no spaces at the start of a line

https://review.coreboot.org/c/coreboot/+/48342/1/src/soc/intel/common/block/... 
PS1, Line 378: 	 u8 spi_sts;
Statements should start on a tabstop

https://review.coreboot.org/c/coreboot/+/48342/1/src/soc/intel/common/block/... 
PS1, Line 382: 	 if (!cse_set_next_boot_partition(bp))
Statements should start on a tabstop

[Sridhar Siricilla (Code Review)]

Sridhar Siricilla has removed Patrick Rudolph from this change.  ( https://review.coreboot.org/c/coreboot/+/48342 )

Change subject: console,soc: print wr protect status
......................................................................

Removed reviewer Patrick Rudolph.

Change in coreboot[master]: console,soc: [TEST] print wr protect status

[Sridhar Siricilla (Code Review)]

Sridhar Siricilla has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/48342 )

Change subject: console,soc: [TEST] print wr protect status
......................................................................

console,soc: [TEST] print wr protect status

Signed-off-by: Sridhar Siricilla 
Change-Id: I140fcee714ca550d403be1e0042e9f729f4417a5
---
M src/console/init.c
M src/soc/intel/common/block/cse/cse_lite.c
2 files changed, 13 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/48342/2

Change in coreboot[master]: soc/intel/common: trigger data_clear everytime system boots from RO

[Sridhar Siricilla (Code Review)]

Hello build bot (Jenkins), Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/48342

to look at the new patch set (#3).

Change subject: soc/intel/common: trigger data_clear everytime system boots from RO
......................................................................

soc/intel/common: trigger data_clear everytime system boots from RO

print wr protect status

Signed-off-by: Sridhar Siricilla 
Change-Id: I140fcee714ca550d403be1e0042e9f729f4417a5
---
M src/console/init.c
M src/soc/intel/common/block/cse/cse_lite.c
2 files changed, 16 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/48342/3

Change in coreboot[master]: soc/intel/common: trigger data_clear everytime system boots from RO

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48342 )

Change subject: soc/intel/common: trigger data_clear everytime system boots from RO
......................................................................

Patch Set 3:

(2 comments)

https://review.coreboot.org/c/coreboot/+/48342/3/src/soc/intel/common/block/... 
File src/soc/intel/common/block/cse/cse_lite.c:

https://review.coreboot.org/c/coreboot/+/48342/3/src/soc/intel/common/block/... 
PS3, Line 377:  
trailing whitespace

https://review.coreboot.org/c/coreboot/+/48342/3/src/soc/intel/common/block/... 
PS3, Line 377:  
please, no spaces at the start of a line

Change in coreboot[master]: soc/intel/common: trigger data_clear everytime system boots from RO

[Sridhar Siricilla (Code Review)]

Sridhar Siricilla has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/48342 )

Change subject: soc/intel/common: trigger data_clear everytime system boots from RO
......................................................................

Abandoned

Change in coreboot[master]: soc/intel/common: trigger data_clear everytime system boots from RO

[Sridhar Siricilla (Code Review)]

Sridhar Siricilla has restored this change. ( https://review.coreboot.org/c/coreboot/+/48342 )

Change subject: soc/intel/common: trigger data_clear everytime system boots from RO
......................................................................

Restored

Change in coreboot[master]: soc/intel/common: trigger data_clear everytime system boots from RO

[Sridhar Siricilla (Code Review)]

Hello build bot (Jenkins), Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/48342

to look at the new patch set (#4).

Change subject: soc/intel/common: trigger data_clear everytime system boots from RO
......................................................................

soc/intel/common: trigger data_clear everytime system boots from RO

print wr protect status

Signed-off-by: Sridhar Siricilla 
Change-Id: I140fcee714ca550d403be1e0042e9f729f4417a5
---
M src/console/init.c
M src/soc/intel/common/block/cse/cse_lite.c
2 files changed, 18 insertions(+), 11 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/48342/4

Change in coreboot[master]: soc/intel/common: trigger data_clear everytime system boots from RO

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48342 )

Change subject: soc/intel/common: trigger data_clear everytime system boots from RO
......................................................................

Patch Set 4:

(2 comments)

https://review.coreboot.org/c/coreboot/+/48342/4/src/soc/intel/common/block/... 
File src/soc/intel/common/block/cse/cse_lite.c:

https://review.coreboot.org/c/coreboot/+/48342/4/src/soc/intel/common/block/... 
PS4, Line 377:  
trailing whitespace

https://review.coreboot.org/c/coreboot/+/48342/4/src/soc/intel/common/block/... 
PS4, Line 377:  
please, no spaces at the start of a line

Change in coreboot[master]: soc/intel/common: [TEST]trigger data_clear everytime system boots fro...

[Rizwan Qureshi (Code Review)]

Rizwan Qureshi has uploaded a new patch set (#5) to the change originally created by Sridhar Siricilla. ( https://review.coreboot.org/c/coreboot/+/48342 )

Change subject: soc/intel/common: [TEST]trigger data_clear everytime system boots from RO
......................................................................

soc/intel/common: [TEST]trigger data_clear everytime system boots from RO

Signed-off-by: Sridhar Siricilla 
Signed-off-by: Rizwan Qureshi 
Change-Id: I140fcee714ca550d403be1e0042e9f729f4417a5
---
M src/console/init.c
M src/soc/intel/common/block/cse/cse_lite.c
M src/soc/intel/jasperlake/finalize.c
3 files changed, 24 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/48342/5

[S] Change in coreboot[master]: soc/intel/common: [TEST]trigger data_clear everytime system boots fro...

[Stefan Reinauer (Code Review)]

Stefan Reinauer has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/48342?usp=email )

Change subject: soc/intel/common: [TEST]trigger data_clear everytime system boots from RO
......................................................................

Abandoned