Attention is currently required from: Rex-BC Chen.
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60316 )
Change subject: soc/mediatek/mt8186: adjust usage of SRAM L2C
......................................................................
Patch Set 2:
(2 comments)
File src/soc/mediatek/mt8186/include/soc/memlayout.ld:
https://review.coreboot.org/c/coreboot/+/60316/comment/d9d1e33c_01a90dc5
PS2, Line 39:
and the rest for cache
https://review.coreboot.org/c/coreboot/+/60316/comment/bbd9ff69_9a2a589c
PS2, Line 40: .
(be aware we can't configure whole L3 to SRAM without any cache).
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Gerrit-Project: coreboot
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