Hello Marshall Dawson, Marshall Dawson,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/40297
to review the following change.
Change subject: soc/amd/picasso: Add PSP SmmInfo support ......................................................................
soc/amd/picasso: Add PSP SmmInfo support
Add functions to set up the structures needed for the SmmInfo function. Issue a SW SMI, and add a new handler to call the new PSP function.
Signed-off-by: Marshall Dawson marshalldawson3rd@gmail.com Change-Id: Iffd2370da7a0db4efeffc6f4cd18aa46167da9d2 --- M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/include/soc/smi.h M src/soc/amd/picasso/psp.c M src/soc/amd/picasso/smi.c M src/soc/amd/picasso/smihandler.c 5 files changed, 48 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/40297/1
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index 5ea02f1..81c62b8 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -48,6 +48,7 @@ select SOC_AMD_COMMON_BLOCK_SATA select SOC_AMD_COMMON_BLOCK_SMBUS select SOC_AMD_COMMON_BLOCK_PSP + select SOC_AMD_COMMON_BLOCK_PSP_GEN2 select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select PARALLEL_MP diff --git a/src/soc/amd/picasso/include/soc/smi.h b/src/soc/amd/picasso/include/soc/smi.h index e890e13..5b7110e 100644 --- a/src/soc/amd/picasso/include/soc/smi.h +++ b/src/soc/amd/picasso/include/soc/smi.h @@ -86,6 +86,7 @@ #define SMITYPE_NB_GPP_HOT_PLUG 30 /* 31 Reserved */ #define SMITYPE_WAKE_L2 32 +#define SMITYPE_PSP 33 /* 33 - 38 Reserved */ #define SMITYPE_AZPME 39 #define SMITYPE_USB_PD_I2C4 40 diff --git a/src/soc/amd/picasso/psp.c b/src/soc/amd/picasso/psp.c index 9780627..c499fa6 100644 --- a/src/soc/amd/picasso/psp.c +++ b/src/soc/amd/picasso/psp.c @@ -3,6 +3,8 @@
#include <console/console.h> #include <cpu/x86/msr.h> +#include <soc/smi.h> +#include <amdblocks/acpimmio_map.h> #include <amdblocks/psp.h>
#define PSP_MAILBOX_OFFSET 0x10570 @@ -20,3 +22,40 @@
return (void *)(psp_mmio + PSP_MAILBOX_OFFSET); } + +void soc_fill_smm_trig_info(struct smm_trigger_info *trig) +{ + if (!trig) + return; + + trig->address = 0xfed802a8; + trig->address_type = SMM_TRIGGER_MEM; + trig->value_width = SMM_TRIGGER_DWORD; + trig->value_and_mask = 0xfdffffff; + trig->value_or_mask = 0x02000000; +} + +void soc_fill_smm_reg_info(struct smm_register_info *reg) +{ + if (!reg) + return; + + reg->smi_enb.address = ACPIMMIO_SMI_BASE + SMI_REG_SMITRIG0; + reg->smi_enb.address_type = SMM_TRIGGER_MEM; + reg->smi_enb.value_width = SMM_TRIGGER_DWORD; + reg->smi_enb.reg_bit_mask = SMITRG0_SMIENB; + reg->smi_enb.expect_value = 0; + + reg->eos.address = ACPIMMIO_SMI_BASE + SMI_REG_SMITRIG0; + reg->eos.address_type = SMM_TRIGGER_MEM; + reg->eos.value_width = SMM_TRIGGER_DWORD; + reg->eos.reg_bit_mask = SMITRG0_EOS; + reg->eos.expect_value = SMITRG0_EOS; + + reg->psp_smi_en.address = ACPIMMIO_SMI_BASE + SMI_REG_CONTROL0; + reg->psp_smi_en.address += sizeof(uint32_t) * SMITYPE_PSP / 16; + reg->psp_smi_en.address_type = SMM_TRIGGER_MEM; + reg->psp_smi_en.value_width = SMM_TRIGGER_DWORD; + reg->psp_smi_en.reg_bit_mask = 0x3 << (2 * SMITYPE_PSP % 16); + reg->psp_smi_en.expect_value = SMI_MODE_SMI << (2 * SMITYPE_PSP % 16); +} diff --git a/src/soc/amd/picasso/smi.c b/src/soc/amd/picasso/smi.c index ab8f405..273c55b 100644 --- a/src/soc/amd/picasso/smi.c +++ b/src/soc/amd/picasso/smi.c @@ -17,6 +17,7 @@ * Utilities for SMM setup */
+#include <arch/io.h> #include <console/console.h> #include <cpu/x86/smm.h> #include <amdblocks/acpimmio.h> @@ -35,4 +36,6 @@ reg &= ~SMITRG0_SMIENB; /* Enable SMI generation */ reg |= SMITRG0_EOS; /* Set EOS bit */ smi_write32(SMI_REG_SMITRIG0, reg); + + outb(APM_CNT_SMMINFO, APM_CNT); } diff --git a/src/soc/amd/picasso/smihandler.c b/src/soc/amd/picasso/smihandler.c index 5549377..e4d1c86 100644 --- a/src/soc/amd/picasso/smihandler.c +++ b/src/soc/amd/picasso/smihandler.c @@ -26,6 +26,7 @@ #include <soc/southbridge.h> #include <amdblocks/acpimmio.h> #include <amdblocks/acpi.h> +#include <amdblocks/psp.h> #include <elog.h>
/* bits in smm_io_trap */ @@ -125,6 +126,9 @@ if (CONFIG(SMMSTORE)) southbridge_smi_store(); break; + case APM_CNT_SMMINFO: + psp_notify_smm(); + break; }
mainboard_smi_apmc(cmd);
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40297 )
Change subject: soc/amd/picasso: Add PSP SmmInfo support ......................................................................
Patch Set 1: Code-Review+1
Hello build bot (Jenkins), Marshall Dawson, Marshall Dawson, Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/40297
to look at the new patch set (#2).
Change subject: soc/amd/picasso: Add PSP SmmInfo support ......................................................................
soc/amd/picasso: Add PSP SmmInfo support
Add functions to set up the structures needed for the SmmInfo function. Issue a SW SMI, and add a new handler to call the new PSP function.
BUG=b:153677737
Signed-off-by: Marshall Dawson marshalldawson3rd@gmail.com Change-Id: Iffd2370da7a0db4efeffc6f4cd18aa46167da9d2 --- M src/soc/amd/picasso/include/soc/smi.h M src/soc/amd/picasso/psp.c M src/soc/amd/picasso/smi.c M src/soc/amd/picasso/smihandler.c 4 files changed, 47 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/40297/2
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40297 )
Change subject: soc/amd/picasso: Add PSP SmmInfo support ......................................................................
Patch Set 3: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/40297/3/src/soc/amd/picasso/psp.c File src/soc/amd/picasso/psp.c:
https://review.coreboot.org/c/coreboot/+/40297/3/src/soc/amd/picasso/psp.c@5... PS3, Line 59: 0x3 Can we add some documentation for what is going on here? Or maybe some #defines?
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40297 )
Change subject: soc/amd/picasso: Add PSP SmmInfo support ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/40297/3/src/soc/amd/picasso/psp.c File src/soc/amd/picasso/psp.c:
https://review.coreboot.org/c/coreboot/+/40297/3/src/soc/amd/picasso/psp.c@5... PS3, Line 59: 0x3
Can we add some documentation for what is going on here? Or maybe some #defines?
Done
Felix Held has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/40297 )
Change subject: soc/amd/picasso: Add PSP SmmInfo support ......................................................................
Abandoned
squashed into 40295
-
Angel Pons (Code Review) -
Felix Held (Code Review)
-
Raul Rangel (Code Review)