Philipp Deppenwiese has uploaded this change for review. ( https://review.coreboot.org/29590
Change subject: soc/intel/fsp_broadwell_de: Add vboot support ......................................................................
soc/intel/fsp_broadwell_de: Add vboot support
Add kconfig option and CMOS function.
Change-Id: I7f1a1e8538999c5e4e54f3a4aa0cdf6d8a309c4f Signed-off-by: Philipp Deppenwiese zaolin.daisuki@gmail.com --- M src/soc/intel/fsp_broadwell_de/Kconfig M src/soc/intel/fsp_broadwell_de/Makefile.inc M src/soc/intel/fsp_broadwell_de/pmutil.c 3 files changed, 28 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/29590/1
diff --git a/src/soc/intel/fsp_broadwell_de/Kconfig b/src/soc/intel/fsp_broadwell_de/Kconfig index ec010b3..457018a 100644 --- a/src/soc/intel/fsp_broadwell_de/Kconfig +++ b/src/soc/intel/fsp_broadwell_de/Kconfig @@ -28,6 +28,9 @@ select TSC_MONOTONIC_TIMER select TSC_CONSTANT_RATE
+config VBOOT + select VBOOT_STARTS_IN_ROMSTAGE + config CBFS_SIZE hex default 0x200000 diff --git a/src/soc/intel/fsp_broadwell_de/Makefile.inc b/src/soc/intel/fsp_broadwell_de/Makefile.inc index 5448190..2de2308 100644 --- a/src/soc/intel/fsp_broadwell_de/Makefile.inc +++ b/src/soc/intel/fsp_broadwell_de/Makefile.inc @@ -31,9 +31,10 @@ ramstage-y += gpio.c ramstage-y += iou_complto.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smmrelocate.c -ramstage-$(CONFIG_HAVE_SMI_HANDLER) += pmutil.c +ramstage-y += pmutil.c +romstage-y += pmutil.c ramstage-y += vtd.c -smm-$(CONFIG_HAVE_SMI_HANDLER) += pmutil.c +smm-y += pmutil.c smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c smm-$(CONFIG_HAVE_SMI_HANDLER) += tsc_freq.c
diff --git a/src/soc/intel/fsp_broadwell_de/pmutil.c b/src/soc/intel/fsp_broadwell_de/pmutil.c index ccab1ce..94ae83e 100644 --- a/src/soc/intel/fsp_broadwell_de/pmutil.c +++ b/src/soc/intel/fsp_broadwell_de/pmutil.c @@ -27,6 +27,7 @@ #include <soc/iomap.h> #include <soc/lpc.h> #include <soc/pci_devs.h> +#include <security/vboot/vbnv.h>
/* Print status bits with descriptive names */ static void print_status_bits(u32 status, const char *const bit_names[]) @@ -171,3 +172,24 @@ smi_en &= ~mask; outl(smi_en, ACPI_BASE_ADDRESS + SMI_EN); } + +int vbnv_cmos_failed(void) +{ + u8 reg8; + int rtc_failed; +#if defined(__SIMPLE_DEVICE__) + pci_devfn_t dev = PCI_DEV(0, LPC_DEV, 0); +#else + struct device *dev = dev_find_slot(0, LPC_DEV_FUNC); +#endif + + reg8 = pci_read_config8(dev, GEN_PMCON_3); + rtc_failed = reg8 & RTC_PWR_STS; + if (rtc_failed) { + reg8 &= ~RTC_PWR_STS; + pci_write_config8(dev, GEN_PMCON_3, reg8); + printk(BIOS_DEBUG, "rtc_failed = 0x%x\n", rtc_failed); + } + + return !!rtc_failed; +}