Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30947
Change subject: soc/intel/icelake: Fix AG3E programming in PMC ......................................................................
soc/intel/icelake: Fix AG3E programming in PMC
According to EDS #571034 4.3.2, GEN_PMCON_A stays in pmc mmio mapped register but not pci configuration spaces, hence change the programming method in icelake pmc driver.
Signed-off-by: Lijian Zhao lijian.zhao@intel.com Change-Id: I29883b50cdca99b45f5362f78cbee32beaa669f7 --- M src/soc/intel/icelake/pmc.c 1 file changed, 3 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/30947/1
diff --git a/src/soc/intel/icelake/pmc.c b/src/soc/intel/icelake/pmc.c index 754aa50..9d1c47f 100644 --- a/src/soc/intel/icelake/pmc.c +++ b/src/soc/intel/icelake/pmc.c @@ -31,8 +31,9 @@ static void pmc_set_afterg3(struct device *dev, int s5pwr) { uint8_t reg8; + uint8_t *pmcbase = pmc_mmio_regs();
- reg8 = pci_read_config8(dev, GEN_PMCON_B); + reg8 = read8(pmcbase + GEN_PMCON_A);
switch (s5pwr) { case MAINBOARD_POWER_STATE_OFF: @@ -46,7 +47,7 @@ break; }
- pci_write_config8(dev, GEN_PMCON_B, reg8); + write8(pmcbase + GEN_PMCON_A, reg8); }
/*
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30947 )
Change subject: soc/intel/icelake: Fix AG3E programming in PMC ......................................................................
Patch Set 3: Code-Review+2
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/30947 )
Change subject: soc/intel/icelake: Fix AG3E programming in PMC ......................................................................
soc/intel/icelake: Fix AG3E programming in PMC
According to EDS #571034 4.3.2, GEN_PMCON_A stays in pmc mmio mapped register but not pci configuration spaces, hence change the programming method in icelake pmc driver.
Signed-off-by: Lijian Zhao lijian.zhao@intel.com Change-Id: I29883b50cdca99b45f5362f78cbee32beaa669f7 Reviewed-on: https://review.coreboot.org/c/30947 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Subrata Banik subrata.banik@intel.com --- M src/soc/intel/icelake/pmc.c 1 file changed, 3 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved
diff --git a/src/soc/intel/icelake/pmc.c b/src/soc/intel/icelake/pmc.c index 754aa50..9d1c47f 100644 --- a/src/soc/intel/icelake/pmc.c +++ b/src/soc/intel/icelake/pmc.c @@ -31,8 +31,9 @@ static void pmc_set_afterg3(struct device *dev, int s5pwr) { uint8_t reg8; + uint8_t *pmcbase = pmc_mmio_regs();
- reg8 = pci_read_config8(dev, GEN_PMCON_B); + reg8 = read8(pmcbase + GEN_PMCON_A);
switch (s5pwr) { case MAINBOARD_POWER_STATE_OFF: @@ -46,7 +47,7 @@ break; }
- pci_write_config8(dev, GEN_PMCON_B, reg8); + write8(pmcbase + GEN_PMCON_A, reg8); }
/*
-
Lijian Zhao (Code Review) -
Patrick Georgi (Code Review)
-
Subrata Banik (Code Review)