[S] Change in coreboot[master]: mb/asus/p8z77-m: Make oboard NIC a child device below PCIe port 5

[Fabian Groffen (Code Review)]

Fabian Groffen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/75106 )

Change subject: mb/asus/p8z77-m: Make oboard NIC a child device below PCIe port 5
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mb/asus/p8z77-m: Make oboard NIC a child device below PCIe port 5

The Realtek RTL8111F NIC is currently not defined at all, nor as a child
device, resulting in the on_board flag not being set to 1.  This means
that Linux / udev will call the device enp3s0 rather than eno0, as is
appropriate for on-board ethernet devices.

Signed-off-by: Fabian Groffen 
Change-Id: I95f01a466a59234d1cbe2420f208bf58ae28fcc6
---
M src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb
1 file changed, 19 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/75106/1

diff --git a/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb b/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb
index c2455c9..b83e538 100644
--- a/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb
+++ b/src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb
@@ -11,7 +11,10 @@
    		device pci 1c.2 off end # PCIe Port #3
    		device pci 1c.3 off end # PCIe Port #4
    		device pci 1c.4 on  end	# PCIe Port #5 (PCIe x1 slot)
-			device pci 1c.5 on  end	# PCIe Port #6
+			device pci 1c.5 on      # RTL8111F
+				subsystemid 0x1849 0x1e1a
+				device pci 00.0 on end  # make onboard
+			end
    		device pci 1c.6 on  end	# PCIe Port #7 (PCI slot via ASM1083)
    		device pci 1c.7 off end # PCIe Port #8
    		device pci 1f.0 on # LPC bridge