Change in coreboot[master]: soc/intel/alderlake: Enable Intel FIVR RFI settings

[build bot (Jenkins) (Code Review)]

Attention is currently required from: Tim Wawrzynczak, Patrick Rudolph.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58878 )

Change subject: soc/intel/alderlake: Enable Intel FIVR RFI settings
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Patch Set 2:

(1 comment)

File src/soc/intel/alderlake/chip.h:

Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-132131):
https://review.coreboot.org/c/coreboot/+/58878/comment/b7e43547_23b9fa95 
PS2, Line 510: 	 *   Range: 0.5%, 1%, 1.5%, 2%, 3%, 4%, 5%, 6%. 
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