Attention is currently required from: Hung-Te Lin, Yu-Ping Wu.
Jianjun Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63252 )
Change subject: soc/mediatek: Fill coreboot table with PCIe info
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Patch Set 13:
(2 comments)
File src/soc/mediatek/common/pcie.c:
https://review.coreboot.org/c/coreboot/+/63252/comment/f156b265_78629880
PS12, Line 216: if (pci_root_bus()) {
Rewrite as […]
Done
https://review.coreboot.org/c/coreboot/+/63252/comment/d2542098_df765a57
PS12, Line 217: pcie->ctrl_base = mtk_pcie_get_controller_base(0);
Set other fields to 0 (using memset)?
I don't think we should initialize it here since the caller has already do it.
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