Patch merged into coreboot/master: 1af3663 baytrail: configure acpi SCI irq

the following patch was just integrated into master:
commit 1af366322e0330960d746e2875d61e202c8dd807
Author: Aaron Durbin 
Date:   Thu Nov 7 10:42:16 2013 -0600

baytrail: configure acpi SCI irq

Baytrail has a configurable SCI irq. Add support for
    properly configuring SCI irq. Note that it is currently
    fixed to IRQ9, but the code supports setting it to the
    other supported values. The current mainboards using
    baytrail defer the madt IRQ override information to the
    chipset.

BUG=chrome-os-partner:23505
    BRANCH=None
    TEST=Built and booted. Noted 'SCI is IRQ9' message.

Change-Id: I7b307bd58f9de944f0cb4c116107a15345499f2e
    Signed-off-by: Aaron Durbin 
    Reviewed-on: https://chromium-review.googlesource.com/176075
    Reviewed-by: Duncan Laurie 
    Reviewed-on: http://review.coreboot.org/4946
    Tested-by: build bot (Jenkins)
    Reviewed-by: Kyösti Mälkki

See http://review.coreboot.org/4946 for details.

-gerrit