Change in coreboot[master]: soc/intel/common/block/pcie/rtd3: Add ModPHY power gate support for RTD3

[Cliff Huang (Code Review)]

Attention is currently required from: Tim Wawrzynczak, Patrick Rudolph.
Cliff Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59855 )

Change subject: soc/intel/common/block/pcie/rtd3: Add ModPHY power gate support for RTD3
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Patch Set 2:

(1 comment)

File src/soc/intel/common/block/pcie/rtd3/rtd3.c:

https://review.coreboot.org/c/coreboot/+/59855/comment/f40616b8_b40c6552 
PS2, Line 39: #define PCH_PCIE_CFG_LCAP_PN 0x4f /* Root Port Number */
> Can we take this chance to clarify LCAP address? It should be 0x4C according to PCH EDS vol2 spec.

I take this back, LCAP is 0x4c and the last byte is for port number (PN).