Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35731 )
Change subject: intel/fsp_baytrail: Drop early timestamp scratchpads ......................................................................
intel/fsp_baytrail: Drop early timestamp scratchpads
These were unused and cryptic.
Change-Id: I074294446501d49a9bd3c823a2a794c33f443168 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/soc/intel/fsp_baytrail/include/soc/pci_devs.h 1 file changed, 0 insertions(+), 15 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/35731/1
diff --git a/src/soc/intel/fsp_baytrail/include/soc/pci_devs.h b/src/soc/intel/fsp_baytrail/include/soc/pci_devs.h index 5cca5ca..5d70879 100644 --- a/src/soc/intel/fsp_baytrail/include/soc/pci_devs.h +++ b/src/soc/intel/fsp_baytrail/include/soc/pci_devs.h @@ -76,10 +76,6 @@ # define SATA_BIST2 0xE8 # define SATA_DEV_FUNC PCI_DEVFN(SATA_DEV,SATA_FUNC)
-#define SATA_MA_BDFO PCI_DEV(BUS0, SATA_DEV, SATA_FUNC), SATA_MA -#define SATA_SP_BDFO PCI_DEV(BUS0, SATA_DEV, SATA_FUNC), SATA_SP -#define SATA_BIST1_BDFO PCI_DEV(BUS0, SATA_DEV, SATA_FUNC), SATA_BIST1 -#define SATA_BIST2_BDFO PCI_DEV(BUS0, SATA_DEV, SATA_FUNC), SATA_BIST2
/* xHCI */ #define XHCI_DEV 0x14 @@ -157,9 +153,6 @@ # define HDA_AZUBAR 0x14 # define HDA_MMLA 0x64 # define HDA_MMUA 0x68 -#define HDA_AZUBAR_BDFO PCI_DEV(BUS0, HDA_DEV, HDA_FUNC), HDA_AZUBAR -#define HDA_MMLA_BDFO PCI_DEV(BUS0, HDA_DEV, HDA_FUNC), HDA_MMLA -#define HDA_MMUA_BDFO PCI_DEV(BUS0, HDA_DEV, HDA_FUNC), HDA_MMUA
/* PCIe Ports */ #define PCIE_DEV 0x1c @@ -226,12 +219,4 @@ # define LPC_BDF PCI_DEV(0, LPC_DEV, LPC_FUNC) # define SMBUS_DEV_FUNC PCI_DEVFN(SMBUS_DEV,SMBUS_FUNC)
-#define INITIAL_TIMESTAMP_LOCATION HDA_MMUA_BDFO -#define BEFORE_CAR_TIMESTAMP_LOCATION SATA_BIST1_BDFO -#define ASM_BEFORE_CAR_TSC_LOC (0x80 << 24 | SATA_DEV_FUNC << 8 | SATA_BIST1) -#define AFTER_CAR_TIMESTAMP_LOCATION SATA_BIST2_BDFO -#define ASM_AFTER_CAR_TSC_LOC (0x80 << 24 | SATA_DEV_FUNC << 8 | SATA_BIST2) -#define START_ROMSTAGE_TIMESTAMP_LOCATION HDA_MMLA_BDFO -#define BEFORE_RAMINIT_TIMESTAMP_LOCATION SATA_MA_BDFO - #endif /* _BAYTRAIL_PCI_DEVS_H_ */
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35731 )
Change subject: intel/fsp_baytrail: Drop early timestamp scratchpads ......................................................................
Patch Set 1: Code-Review+2
I suspect that given that FSP1.0 does not specify what registers it uses during FSP-T this was to be used as a scratchpad register for initial timestamps.
Hello Werner Zeh, Patrick Rudolph, Huang Jin, Arthur Heymans, Philipp Deppenwiese, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35731
to look at the new patch set (#2).
Change subject: intel/fsp_baytrail: Drop early timestamp scratchpads ......................................................................
intel/fsp_baytrail: Drop early timestamp scratchpads
These were unused and cryptic.
Change-Id: I074294446501d49a9bd3c823a2a794c33f443168 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/soc/intel/fsp_baytrail/include/soc/pci_devs.h 1 file changed, 0 insertions(+), 63 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/35731/2
Hello Werner Zeh, Patrick Rudolph, Huang Jin, Arthur Heymans, Philipp Deppenwiese, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35731
to look at the new patch set (#3).
Change subject: intel/fsp_baytrail: Drop early timestamp scratchpads ......................................................................
intel/fsp_baytrail: Drop early timestamp scratchpads
These were unused and cryptic.
Change-Id: I074294446501d49a9bd3c823a2a794c33f443168 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/soc/intel/fsp_baytrail/include/soc/pci_devs.h 1 file changed, 0 insertions(+), 25 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/35731/3
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35731 )
Change subject: intel/fsp_baytrail: Drop early timestamp scratchpads ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35731/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/35731/3//COMMIT_MSG@7 PS3, Line 7: Drop early timestamp scratchpads wrong commit description?
Hello Werner Zeh, Aaron Durbin, Patrick Rudolph, Huang Jin, Arthur Heymans, Philipp Deppenwiese, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35731
to look at the new patch set (#4).
Change subject: intel/fsp_baytrail: Drop some PCI scratchpad register definitions ......................................................................
intel/fsp_baytrail: Drop some PCI scratchpad register definitions
These were unused and somewhat cryptic, assumed purpose was to store pre-CBMEM timestamps in various PCI config space locations.
Change-Id: I074294446501d49a9bd3c823a2a794c33f443168 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/soc/intel/fsp_baytrail/include/soc/pci_devs.h 1 file changed, 0 insertions(+), 25 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/35731/4
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35731 )
Change subject: intel/fsp_baytrail: Drop some PCI scratchpad register definitions ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35731/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/35731/3//COMMIT_MSG@7 PS3, Line 7: Drop early timestamp scratchpads
wrong commit description?
Not really wrong, but rephrased it.
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35731 )
Change subject: intel/fsp_baytrail: Drop some PCI scratchpad register definitions ......................................................................
Patch Set 4: Code-Review+2
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35731 )
Change subject: intel/fsp_baytrail: Drop some PCI scratchpad register definitions ......................................................................
Patch Set 4: Code-Review+2
Kyösti Mälkki has submitted this change. ( https://review.coreboot.org/c/coreboot/+/35731 )
Change subject: intel/fsp_baytrail: Drop some PCI scratchpad register definitions ......................................................................
intel/fsp_baytrail: Drop some PCI scratchpad register definitions
These were unused and somewhat cryptic, assumed purpose was to store pre-CBMEM timestamps in various PCI config space locations.
Change-Id: I074294446501d49a9bd3c823a2a794c33f443168 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/35731 Reviewed-by: Aaron Durbin adurbin@chromium.org Reviewed-by: Furquan Shaikh furquan@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/fsp_baytrail/include/soc/pci_devs.h 1 file changed, 0 insertions(+), 25 deletions(-)
Approvals: build bot (Jenkins): Verified Aaron Durbin: Looks good to me, approved Furquan Shaikh: Looks good to me, approved
diff --git a/src/soc/intel/fsp_baytrail/include/soc/pci_devs.h b/src/soc/intel/fsp_baytrail/include/soc/pci_devs.h index a6e37dc..a920194 100644 --- a/src/soc/intel/fsp_baytrail/include/soc/pci_devs.h +++ b/src/soc/intel/fsp_baytrail/include/soc/pci_devs.h @@ -58,18 +58,8 @@ /* SATA */ #define SATA_DEV 0x13 #define SATA_FUNC 0 -# define SATA_MA 0x84 -# define SATA_MAP 0x90 -# define SATA_PSC 0x92 -# define SATA_SP 0xD0 -# define SATA_BIST1 0xE4 -# define SATA_BIST2 0xE8 # define SATA_DEV_FUNC PCI_DEVFN(SATA_DEV,SATA_FUNC)
-#define SATA_MA_BDFO PCI_DEV(BUS0, SATA_DEV, SATA_FUNC), SATA_MA -#define SATA_SP_BDFO PCI_DEV(BUS0, SATA_DEV, SATA_FUNC), SATA_SP -#define SATA_BIST1_BDFO PCI_DEV(BUS0, SATA_DEV, SATA_FUNC), SATA_BIST1 -#define SATA_BIST2_BDFO PCI_DEV(BUS0, SATA_DEV, SATA_FUNC), SATA_BIST2
/* xHCI */ #define XHCI_DEV 0x14 @@ -130,12 +120,6 @@ #define HDA_DEV 0x1b #define HDA_FUNC 0 # define HDA_DEV_FUNC PCI_DEVFN(HDA_DEV,HDA_FUNC) -# define HDA_AZUBAR 0x14 -# define HDA_MMLA 0x64 -# define HDA_MMUA 0x68 -#define HDA_AZUBAR_BDFO PCI_DEV(BUS0, HDA_DEV, HDA_FUNC), HDA_AZUBAR -#define HDA_MMLA_BDFO PCI_DEV(BUS0, HDA_DEV, HDA_FUNC), HDA_MMLA -#define HDA_MMUA_BDFO PCI_DEV(BUS0, HDA_DEV, HDA_FUNC), HDA_MMUA
/* PCIe Ports */ #define PCIE_DEV 0x1c @@ -189,15 +173,6 @@ # define LPC_BDF PCI_DEV(0, LPC_DEV, LPC_FUNC) # define SMBUS_DEV_FUNC PCI_DEVFN(SMBUS_DEV,SMBUS_FUNC)
-#define INITIAL_TIMESTAMP_LOCATION HDA_MMUA_BDFO -#define BEFORE_CAR_TIMESTAMP_LOCATION SATA_BIST1_BDFO -#define ASM_BEFORE_CAR_TSC_LOC (0x80 << 24 | SATA_DEV_FUNC << 8 | SATA_BIST1) -#define AFTER_CAR_TIMESTAMP_LOCATION SATA_BIST2_BDFO -#define ASM_AFTER_CAR_TSC_LOC (0x80 << 24 | SATA_DEV_FUNC << 8 | SATA_BIST2) -#define START_ROMSTAGE_TIMESTAMP_LOCATION HDA_MMLA_BDFO -#define BEFORE_RAMINIT_TIMESTAMP_LOCATION SATA_MA_BDFO - - #define SOC_DEVID 0x0f00 #define GFX_DEVID 0x0f31 #define MIPI_DEVID 0x0f38