Change in coreboot[master]: minnowmax: allow both 1333 and 1066 MHz memory SKUs

[Michał Żygowski (Code Review)]

Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/27989

Change subject: minnowmax: allow both 1333 and 1066 MHz memory SKUs
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minnowmax: allow both 1333 and 1066 MHz memory SKUs

The E3827 and E3845 SKUs are fused at 1333MHz DDR3 speeds.
Use frequency as a proxy to determine SKU. The E3805, E3815,
E3825, and E3826 are all <= 1460MHz while the E3827 and E3845
are 1750MHz and 1910MHz, respectively. This will allow to boot
quad-core Minnowboard Turbot especially.

Change-Id: I5e57dd419b443dfa742c8812cec87274af557728
Signed-off-by: Michał Żygowski 
---
M src/mainboard/intel/minnowmax/romstage.c
1 file changed, 58 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/27989/1

diff --git a/src/mainboard/intel/minnowmax/romstage.c b/src/mainboard/intel/minnowmax/romstage.c
index 6f40207..b962c55 100644
--- a/src/mainboard/intel/minnowmax/romstage.c
+++ b/src/mainboard/intel/minnowmax/romstage.c
@@ -21,6 +21,7 @@
 #include <console/console.h>
 #include <soc/gpio.h>
 #include <soc/intel/fsp_baytrail/chip.h>
+#include <cpu/x86/tsc.h>

/**
  * /brief mainboard call for setup that needs to be done before fsp init
@@ -50,11 +51,68 @@

}

+/* Set up the default soldered down memory config for 1GB */
+static const MEMORY_DOWN_DATA minnowmax_memory_config[] = {
+	/* 1066 */
+	{
+	.EnableMemoryDown = 1,
+	.DRAMSpeed = 1,      /* DRAM Speed: 0=800, 1=1066, 2=1333, 3=1600*/
+	.DRAMType = 1,       /* DRAM Type: 0=DDR3, 1=DDR3L, 2=DDR3U, 4=LPDDR2, 5=LPDDR3, 6=DDR4*/
+	.DIMM0Enable = 1,    /* DIMM 0 Enable */
+	.DIMM1Enable = 0,    /* DIMM 1 Enable */
+	.DIMMDWidth = 1,     /* DRAM device data width: 0=x8, 1=x16, 2=x32*/
+	.DIMMDensity = 1,    /* DRAM device data density: 0=1Gb, 1=2Gb, 2=4Gb, 3=8Gb */
+	.DIMMBusWidth = 3,   /* DIMM Bus Width: 0=8bit, 1=16bit, 2=32bit, 3=64bit */
+	.DIMMSides = 0,      /* Ranks Per DIMM: 0=1rank, 1=2rank */
+	.DIMMtCL = 11,        /* tCL */
+	.DIMMtRPtRCD = 11,    /* tRP and tRCD in DRAM clk - 5:12.5ns, 6:15ns, etc. */
+	.DIMMtWR = 12,        /* tWR in DRAM clk  */
+	.DIMMtWTR = 6,       /* tWTR in DRAM clk */
+	.DIMMtRRD = 6,       /* tRRD in DRAM clk */
+	.DIMMtRTP = 6,       /* tRTP in DRAM clk */
+	.DIMMtFAW = 20,      /* tFAW in DRAM clk */
+	},
+	/* 1333 */
+	{
+	.EnableMemoryDown = 1,
+	.DRAMSpeed = 2,      /* DRAM Speed: 0=800, 1=1066, 2=1333, 3=1600*/
+	.DRAMType = 1,       /* DRAM Type: 0=DDR3, 1=DDR3L, 2=DDR3U, 4=LPDDR2, 5=LPDDR3, 6=DDR4*/
+	.DIMM0Enable = 1,    /* DIMM 0 Enable */
+	.DIMM1Enable = 0,    /* DIMM 1 Enable */
+	.DIMMDWidth = 1,     /* DRAM device data width: 0=x8, 1=x16, 2=x32*/
+	.DIMMDensity = 1,    /* DRAM device data density: 0=1Gb, 1=2Gb, 2=4Gb, 3=8Gb */
+	.DIMMBusWidth = 3,   /* DIMM Bus Width: 0=8bit, 1=16bit, 2=32bit, 3=64bit */
+	.DIMMSides = 0,      /* Ranks Per DIMM: 0=1rank, 1=2rank */
+	.DIMMtCL = 9,        /* tCL */
+	.DIMMtRPtRCD = 9,    /* tRP and tRCD in DRAM clk - 5:12.5ns, 6:15ns, etc. */
+	.DIMMtWR = 10,       /* tWR in DRAM clk  */
+	.DIMMtWTR = 5,       /* tWTR in DRAM clk */
+	.DIMMtRRD = 4,       /* tRRD in DRAM clk */
+	.DIMMtRTP = 5,       /* tRTP in DRAM clk */
+	.DIMMtFAW = 30,      /* tFAW in DRAM clk */
+	}
+};
+
 void romstage_fsp_rt_buffer_callback(FSP_INIT_RT_BUFFER *FspRtBuffer)
 {
    UPD_DATA_REGION *UpdData = FspRtBuffer->Common.UpdDataRgnPtr;
    u8 use_xhci = UpdData->PcdEnableXhci;
    u8 gpio5 = 0;
+	int is_1333_sku;
+
+	/*
+	 * The E3827 and E3845 SKUs are fused at 1333MHz DDR3 speeds. There's
+	 * no good way of knowing the SKU'ing so frequency is used as a proxy.
+	 * The E3805, E3815, E3825, and E3826 are all <= 1460MHz while the
+	 * E3827 and E3845 are 1750MHz and 1910MHz, respectively.
+	 */
+	is_1333_sku = !!(tsc_freq_mhz() >= 1700);
+
+	printk(BIOS_INFO, "Using %d MHz DDR3 settings.\n",
+		is_1333_sku ? 1333 : 1066);
+
+	/* Set up soldered down memory parameters for 1GB */
+	UpdData->PcdMemoryParameters = minnowmax_memory_config[is_1333_sku];

/*
     * Minnow Max Board