Change in coreboot[master]: soc/intel/elkhartlake: Update FSP-S UPD LPSS related configs

[Paul Menzel (Code Review)]

Attention is currently required from: Maulik V Vaghela, Mario Scheithauer, Subrata Banik, Lean Sheng Tan, Patrick Rudolph.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54959 )

Change subject: soc/intel/elkhartlake: Update FSP-S UPD LPSS related configs
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Patch Set 9:

(2 comments)

File src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb:

https://review.coreboot.org/c/coreboot/+/54959/comment/d2a21af7_badebba9 
PS9, Line 54: 		[PchSerialIoIndexI2C7]  = PchSerialIoPci,
Will there be more than 7? If not, please only use one space before the =.

https://review.coreboot.org/c/coreboot/+/54959/comment/ae025ce6_cecb9225 
PS9, Line 112: 		device pci 09.0 off	end # CPU Intel Trace Hub
Unrelated, please the inconsistency of using spaces/tabs before end in a separate commit.