Change in coreboot[master]: nb/intel/sandybridge/raminit: Fix SMBIOS 17 bus width

[Patrick Rudolph (Code Review)]

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/22261

Change subject: nb/intel/sandybridge/raminit: Fix SMBIOS 17 bus width
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nb/intel/sandybridge/raminit: Fix SMBIOS 17 bus width

The bus width has to be encoded where the lower 3 bits are the bus width
in multiple of 8 and the following two bits give the error checking
bits in multiple of 8.
Hardcode to 64 bit as done on haswell.

Change-Id: I3b83a098205455b1c820d0436c6984938f261466
Signed-off-by: Patrick Rudolph 
---
M src/northbridge/intel/sandybridge/raminit.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/22261/1

diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index 12384b4..72f90d0 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -110,7 +110,7 @@
    			   info->dimm[channel][slot].part_number, 16);
    		dimm->mod_id = info->dimm[channel][slot].manufacturer_id;
    		dimm->mod_type = info->dimm[channel][slot].dimm_type;
-			dimm->bus_width = info->dimm[channel][slot].width;
+			dimm->bus_width = 0x3; /* 64 Bit */
    		mem_info->dimm_cnt++;
    	}
    }