[XS] Change in coreboot[main]: arch/riscv: reset the pmp on startup

[ron minnich (Code Review)]

Attention is currently required from: Arthur Heymans, Maximilian Brune, Philipp Hug.

ron minnich has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81282?usp=email )

Change subject: arch/riscv: reset the pmp on startup
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Patch Set 1:

(1 comment)

File src/arch/riscv/virtual_memory.c:

https://review.coreboot.org/c/coreboot/+/81282/comment/756d48db_2de7e230 :
PS1, Line 50: 	reset_pmp();
> I'm thinking, if we should move mstatus_init to be invoked much later (e.g. […]

This particular function is safe to run very early. It barely needs to be a function, certainly not this complex, since the four pmpcfg registers are WARL.

I wonder about just running the 2 or 4 CSR writes in early assembly and calling it good. I'd be inclined to take this as a TODO for now?

The current code has a bitmask for used PMPs, and I don't like seeing that lying around. There is further optimization we might make to get rid of that bitmask. We could write the pattern 0x11111111 to the pmpcfg, and all pmpcfg that are implemented would then have the X bit set, but not be enabled. Then it's a simple test to find the next avaailable correctly implement pmpcfg: if A == 0, and X is 1, then it's a valid, unused pmpcfg.

This pattern, again, could be written in very early assembly, with 32- or 64-bit writes, and we'd then have a far simpler pmp reset situation then we do today. WDYT?