Change in coreboot[master]: soc/intel/alderlake: provide a list of D-states to enter LPM

[Subrata Banik (Code Review)]

Attention is currently required from: Tarun Tuli, Paul Menzel.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63969 )

Change subject: soc/intel/alderlake: provide a list of D-states to enter LPM
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Patch Set 12:

(2 comments)

File src/soc/intel/alderlake/acpi.c:

https://review.coreboot.org/c/coreboot/+/63969/comment/ae50738c_57b419a9 
PS12, Line 179: min_pci_d_states
> Yes we could instead add statements for each device to populate at run time if we feel that improves clarity/readability.  I'm somewhat indifferent on which may be cleaner so am open to the consensus.

we can do it later as well.
> In your second suggestion, are you proposing to include the D-states within the devicetree itself and propagating those up?

IMO, device tree is cleaner but if you and Tim already discussed then I'm okay

File src/soc/intel/common/block/acpi/pep.c:

https://review.coreboot.org/c/coreboot/+/63969/comment/fd3cb647_bbc906f3 
PS12, Line 115: 	/* SoC returned more than zero devices so use those. */
              : 	printk(BIOS_INFO, "Returning SoC specific constraint package for %d devices\n", num_devices)
> Yes.  Will just show on boot how many devices we have emitted in this table.

Ack