Change in coreboot[master]: soc/intel/common: Prevent SMI storm when setting SPI WPD bit - coreboot-gerrit

3 Mar 2021


      Attention is currently required from: Nico Huber, Patrick Rudolph, Benjamin Doron, Tim Wawrzynczak.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50754 )
Change subject: soc/intel/common: Prevent SMI storm when setting SPI WPD bit
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Patch Set 4:
(1 comment)
File src/soc/intel/common/block/fast_spi/fast_spi.c:
https://review.coreboot.org/c/coreboot/+/50754/comment/feb62527_b0963ecf 
PS3, Line 393: SPI_BIOS_CONTROL
...
check if bit8 is set. If it's not this function will accidently enable SMI on write protect disable.
How would this happen?
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Gerrit-Project: coreboot
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Gerrit-Change-Id: Iec498674ae70f6590c33a6bf4967876268f2b0c8
Gerrit-Change-Number: 50754
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