Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43897 )
Change subject: soc/intel/tigerlake: Simplify if-statements ......................................................................
soc/intel/tigerlake: Simplify if-statements
Simplify if-statements and use is_dev_enabled() where possible.
Change-Id: I791273e5dd633cd1d6218b322106e2f62a393259 Signed-off-by: Felix Singer felixsinger@posteo.net --- M src/soc/intel/tigerlake/acpi.c M src/soc/intel/tigerlake/fsp_params.c M src/soc/intel/tigerlake/romstage/fsp_params.c 3 files changed, 27 insertions(+), 66 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/43897/1
diff --git a/src/soc/intel/tigerlake/acpi.c b/src/soc/intel/tigerlake/acpi.c index 235b2b3..c7c5446 100644 --- a/src/soc/intel/tigerlake/acpi.c +++ b/src/soc/intel/tigerlake/acpi.c @@ -7,6 +7,7 @@ #include <arch/smp/mpspec.h> #include <cbmem.h> #include <console/console.h> +#include <device/device.h> #include <device/pci_ops.h> #include <ec/google/chromeec/ec.h> #include <intelblocks/cpulib.h> @@ -187,7 +188,7 @@ uint64_t gfxvtbar = MCHBAR64(GFXVTBAR) & VTBAR_MASK; bool gfxvten = MCHBAR32(GFXVTBAR) & VTBAR_ENABLED;
- if (igfx_dev && igfx_dev->enabled && gfxvtbar && gfxvten) { + if (is_dev_enabled(igfx_dev) && gfxvtbar && gfxvten) { unsigned long tmp = current;
current += acpi_create_dmar_drhd(current, 0, 0, gfxvtbar); @@ -200,7 +201,7 @@ uint64_t ipuvtbar = MCHBAR64(IPUVTBAR) & VTBAR_MASK; bool ipuvten = MCHBAR32(IPUVTBAR) & VTBAR_ENABLED;
- if (ipu_dev && ipu_dev->enabled && ipuvtbar && ipuvten) { + if (is_dev_enabled(ipu_dev) && ipuvtbar && ipuvten) { unsigned long tmp = current;
current += acpi_create_dmar_drhd(current, 0, 0, ipuvtbar); diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c index cf24021..8275f14 100644 --- a/src/soc/intel/tigerlake/fsp_params.c +++ b/src/soc/intel/tigerlake/fsp_params.c @@ -99,7 +99,7 @@
/* Check if IGD is present and fill Graphics init param accordingly */ dev = pcidev_path_on_root(SA_DEVFN_IGD); - if (CONFIG(RUN_FSP_GOP) && dev && dev->enabled) + if (CONFIG(RUN_FSP_GOP) && is_dev_enabled(dev)) params->PeiGraphicsPeimInit = 1; else params->PeiGraphicsPeimInit = 0; @@ -195,10 +195,8 @@
/* SATA */ dev = pcidev_path_on_root(PCH_DEVFN_SATA); - if (!dev) - params->SataEnable = 0; - else { - params->SataEnable = dev->enabled; + params->SataEnable = is_dev_enabled(dev); + if (params->SataEnable) { params->SataMode = config->SataMode; params->SataSalpSupport = config->SataSalpSupport; memcpy(params->SataPortsEnable, config->SataPortsEnable, @@ -244,37 +242,22 @@
/* LAN */ dev = pcidev_path_on_root(PCH_DEVFN_GBE); - if (!dev) - params->PchLanEnable = 0; - else - params->PchLanEnable = dev->enabled; + params->PchLanEnable = is_dev_enabled(dev);
/* CNVi */ dev = pcidev_path_on_root(PCH_DEVFN_CNVI_WIFI); - if (dev) - params->CnviMode = dev->enabled; - else - params->CnviMode = 0; + params->CnviMode = is_dev_enabled(dev);
/* VMD */ dev = pcidev_path_on_root(SA_DEVFN_VMD); - if (dev) - params->VmdEnable = dev->enabled; - else - params->VmdEnable = 0; + params->VmdEnable = is_dev_enabled(dev);
/* THC */ dev = pcidev_path_on_root(PCH_DEVFN_THC0); - if (!dev) - params->ThcPort0Assignment = 0; - else - params->ThcPort0Assignment = dev->enabled ? THC_0 : THC_NONE; + params->ThcPort0Assignment = is_dev_enabled(dev) ? THC_0 : THC_NONE;
dev = pcidev_path_on_root(PCH_DEVFN_THC1); - if (!dev) - params->ThcPort1Assignment = 0; - else - params->ThcPort1Assignment = dev->enabled ? THC_1 : THC_NONE; + params->ThcPort1Assignment = is_dev_enabled(dev) ? THC_1 : THC_NONE;
/* Legacy 8254 timer support */ params->Enable8254ClockGating = !CONFIG_USE_LEGACY_8254_TIMER; diff --git a/src/soc/intel/tigerlake/romstage/fsp_params.c b/src/soc/intel/tigerlake/romstage/fsp_params.c index 662ca06..cf39f77 100644 --- a/src/soc/intel/tigerlake/romstage/fsp_params.c +++ b/src/soc/intel/tigerlake/romstage/fsp_params.c @@ -3,6 +3,7 @@ #include <assert.h> #include <console/console.h> #include <cpu/x86/msr.h> +#include <device/device.h> #include <fsp/util.h> #include <intelblocks/cpulib.h> #include <soc/gpio_soc_defs.h> @@ -21,14 +22,12 @@ const struct device *dev;
dev = pcidev_path_on_root(SA_DEVFN_IGD); - if (!dev || !dev->enabled) { - /* Skip IGD initialization in FSP if device is disabled in devicetree.cb */ - m_cfg->InternalGfx = 0; - m_cfg->IgdDvmt50PreAlloc = 0; - } else { - m_cfg->InternalGfx = 1; + m_cfg->InternalGfx = is_dev_enabled(dev); + if (m_cfg->InternalGfx) { /* Set IGD stolen size to 60MB. */ m_cfg->IgdDvmt50PreAlloc = 0xFE; + } else { + m_cfg->IgdDvmt50PreAlloc = 0; }
m_cfg->TsegSize = CONFIG_SMM_TSEG_SIZE; @@ -75,7 +74,7 @@
/* TraceHub configuration */ dev = pcidev_path_on_root(PCH_DEVFN_TRACEHUB); - if (dev && dev->enabled && config->TraceHubMode) { + if (is_dev_enabled(dev) && config->TraceHubMode) { m_cfg->PcdDebugInterfaceFlags |= DEBUG_INTERFACE_TRACEHUB; m_cfg->PchTraceHubMode = config->TraceHubMode; m_cfg->CpuTraceHubMode = config->TraceHubMode; @@ -86,10 +85,7 @@
/* ISH */ dev = pcidev_path_on_root(PCH_DEVFN_ISH); - if (!dev || !dev->enabled) - m_cfg->PchIshEnable = 0; - else - m_cfg->PchIshEnable = 1; + m_cfg->PchIshEnable = is_dev_enabled(dev);
/* DP port config */ m_cfg->DdiPortAConfig = config->DdiPortAConfig; @@ -118,39 +114,23 @@
/* TCSS DMA */ dev = pcidev_path_on_root(SA_DEVFN_TCSS_DMA0); - if (dev) - m_cfg->TcssDma0En = dev->enabled; - else - m_cfg->TcssDma0En = 0; + m_cfg->TcssDma0En = is_dev_enabled(dev);
dev = pcidev_path_on_root(SA_DEVFN_TCSS_DMA1); - if (dev) - m_cfg->TcssDma1En = dev->enabled; - else - m_cfg->TcssDma1En = 0; + m_cfg->TcssDma1En = is_dev_enabled(dev);
/* USB4/TBT */ dev = pcidev_path_on_root(SA_DEVFN_TBT0); - if (dev) - m_cfg->TcssItbtPcie0En = dev->enabled; - else - m_cfg->TcssItbtPcie0En = 0; + m_cfg->TcssItbtPcie0En = is_dev_enabled(dev); + dev = pcidev_path_on_root(SA_DEVFN_TBT1); - if (dev) - m_cfg->TcssItbtPcie1En = dev->enabled; - else - m_cfg->TcssItbtPcie1En = 0; + m_cfg->TcssItbtPcie1En = is_dev_enabled(dev);
dev = pcidev_path_on_root(SA_DEVFN_TBT2); - if (dev) - m_cfg->TcssItbtPcie2En = dev->enabled; - else - m_cfg->TcssItbtPcie2En = 0; + m_cfg->TcssItbtPcie2En = is_dev_enabled(dev); + dev = pcidev_path_on_root(SA_DEVFN_TBT3); - if (dev) - m_cfg->TcssItbtPcie3En = dev->enabled; - else - m_cfg->TcssItbtPcie3En = 0; + m_cfg->TcssItbtPcie3En = is_dev_enabled(dev);
/* Hyper Threading */ m_cfg->HyperThreading = !config->HyperThreadingDisable; @@ -166,10 +146,7 @@
/* Audio: HDAUDIO_LINK_MODE I2S/SNDW */ dev = pcidev_path_on_root(PCH_DEVFN_HDA); - if (!dev) - m_cfg->PchHdaEnable = 0; - else - m_cfg->PchHdaEnable = dev->enabled; + m_cfg->PchHdaEnable = is_dev_enabled(dev);
m_cfg->PchHdaDspEnable = config->PchHdaDspEnable; m_cfg->PchHdaAudioLinkHdaEnable = config->PchHdaAudioLinkHdaEnable;
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43897 )
Change subject: soc/intel/tigerlake: Simplify if-statements ......................................................................
Patch Set 2: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/43897/2/src/soc/intel/tigerlake/rom... File src/soc/intel/tigerlake/romstage/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/43897/2/src/soc/intel/tigerlake/rom... PS2, Line 25: m_cfg->InternalGfx = is_dev_enabled(dev); : if (m_cfg->InternalGfx) { : /* Set IGD stolen size to 60MB. */ : m_cfg->IgdDvmt50PreAlloc = 0xFE; : } else { : m_cfg->IgdDvmt50PreAlloc = 0; : } : What about this? m_cfg->IgdDvmt50PreAlloc = m_cfg->InternalGfx ? 0xFE : 0;
Hello build bot (Jenkins), Michael Niewöhner, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43897
to look at the new patch set (#3).
Change subject: soc/intel/tigerlake: Simplify if-statements ......................................................................
soc/intel/tigerlake: Simplify if-statements
Simplify if-statements and use is_dev_enabled() where possible.
Change-Id: I791273e5dd633cd1d6218b322106e2f62a393259 Signed-off-by: Felix Singer felixsinger@posteo.net --- M src/soc/intel/tigerlake/acpi.c M src/soc/intel/tigerlake/fsp_params.c M src/soc/intel/tigerlake/romstage/fsp_params.c 3 files changed, 26 insertions(+), 69 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/43897/3
Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43897 )
Change subject: soc/intel/tigerlake: Simplify if-statements ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/43897/2/src/soc/intel/tigerlake/rom... File src/soc/intel/tigerlake/romstage/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/43897/2/src/soc/intel/tigerlake/rom... PS2, Line 25: m_cfg->InternalGfx = is_dev_enabled(dev); : if (m_cfg->InternalGfx) { : /* Set IGD stolen size to 60MB. */ : m_cfg->IgdDvmt50PreAlloc = 0xFE; : } else { : m_cfg->IgdDvmt50PreAlloc = 0; : } :
What about this? […]
Way better :)
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43897 )
Change subject: soc/intel/tigerlake: Simplify if-statements ......................................................................
Patch Set 3: Code-Review+2
Hello build bot (Jenkins), Michael Niewöhner, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43897
to look at the new patch set (#4).
Change subject: soc/intel/tigerlake: Simplify if-statements ......................................................................
soc/intel/tigerlake: Simplify if-statements
Simplify if-statements and use is_dev_enabled() where possible.
Change-Id: I791273e5dd633cd1d6218b322106e2f62a393259 Signed-off-by: Felix Singer felixsinger@posteo.net --- M src/soc/intel/tigerlake/acpi.c M src/soc/intel/tigerlake/fsp_params.c M src/soc/intel/tigerlake/romstage/fsp_params.c 3 files changed, 26 insertions(+), 72 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/43897/4
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43897 )
Change subject: soc/intel/tigerlake: Simplify if-statements ......................................................................
Patch Set 4: Code-Review+2
(2 comments)
https://review.coreboot.org/c/coreboot/+/43897/4/src/soc/intel/tigerlake/fsp... File src/soc/intel/tigerlake/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/43897/4/src/soc/intel/tigerlake/fsp... PS4, Line 23: #define THC_NONE 0 ok, we're good.
https://review.coreboot.org/c/coreboot/+/43897/4/src/soc/intel/tigerlake/rom... File src/soc/intel/tigerlake/romstage/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/43897/4/src/soc/intel/tigerlake/rom... PS4, Line 26: /* Set IGD stolen size to 60MB. */ If IGD is enabled, set IGD stolen size to 60MB. Otherwise, skip IGD init in FSP.
Hello build bot (Jenkins), Angel Pons, Michael Niewöhner, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43897
to look at the new patch set (#5).
Change subject: soc/intel/tigerlake: Simplify is-device-enabled checks ......................................................................
soc/intel/tigerlake: Simplify is-device-enabled checks
Simplify if-statements and use is_dev_enabled() where possible.
Change-Id: I791273e5dd633cd1d6218b322106e2f62a393259 Signed-off-by: Felix Singer felixsinger@posteo.net --- M src/soc/intel/tigerlake/acpi.c M src/soc/intel/tigerlake/fsp_params.c M src/soc/intel/tigerlake/romstage/fsp_params.c 3 files changed, 29 insertions(+), 72 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/43897/5
Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43897 )
Change subject: soc/intel/tigerlake: Simplify is-device-enabled checks ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/43897/4/src/soc/intel/tigerlake/rom... File src/soc/intel/tigerlake/romstage/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/43897/4/src/soc/intel/tigerlake/rom... PS4, Line 26: /* Set IGD stolen size to 60MB. */
If IGD is enabled, set IGD stolen size to 60MB. Otherwise, skip IGD init in FSP.
Done
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43897 )
Change subject: soc/intel/tigerlake: Simplify is-device-enabled checks ......................................................................
Patch Set 5: Code-Review+1
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43897 )
Change subject: soc/intel/tigerlake: Simplify is-device-enabled checks ......................................................................
Patch Set 5: Code-Review+2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43897 )
Change subject: soc/intel/tigerlake: Simplify is-device-enabled checks ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/43897/5/src/soc/intel/tigerlake/rom... File src/soc/intel/tigerlake/romstage/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/43897/5/src/soc/intel/tigerlake/rom... PS5, Line 30: m_cfg->IgdDvmt50PreAlloc = m_cfg->InternalGfx ? 0xFE : 0; My +1 is because I don't really like this.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43897 )
Change subject: soc/intel/tigerlake: Simplify is-device-enabled checks ......................................................................
Patch Set 6: Code-Review+2
Angel Pons has removed a vote from this change. ( https://review.coreboot.org/c/coreboot/+/43897 )
Change subject: soc/intel/tigerlake: Simplify is-device-enabled checks ......................................................................
Removed Code-Review+1 by Angel Pons th3fanbus@gmail.com
Michael Niewöhner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/43897 )
Change subject: soc/intel/tigerlake: Simplify is-device-enabled checks ......................................................................
soc/intel/tigerlake: Simplify is-device-enabled checks
Simplify if-statements and use is_dev_enabled() where possible.
Change-Id: I791273e5dd633cd1d6218b322106e2f62a393259 Signed-off-by: Felix Singer felixsinger@posteo.net Reviewed-on: https://review.coreboot.org/c/coreboot/+/43897 Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org Reviewed-by: Michael Niewöhner Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/tigerlake/acpi.c M src/soc/intel/tigerlake/fsp_params.c M src/soc/intel/tigerlake/romstage/fsp_params.c 3 files changed, 29 insertions(+), 72 deletions(-)
Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved Michael Niewöhner: Looks good to me, approved
diff --git a/src/soc/intel/tigerlake/acpi.c b/src/soc/intel/tigerlake/acpi.c index 235b2b3..c7c5446 100644 --- a/src/soc/intel/tigerlake/acpi.c +++ b/src/soc/intel/tigerlake/acpi.c @@ -7,6 +7,7 @@ #include <arch/smp/mpspec.h> #include <cbmem.h> #include <console/console.h> +#include <device/device.h> #include <device/pci_ops.h> #include <ec/google/chromeec/ec.h> #include <intelblocks/cpulib.h> @@ -187,7 +188,7 @@ uint64_t gfxvtbar = MCHBAR64(GFXVTBAR) & VTBAR_MASK; bool gfxvten = MCHBAR32(GFXVTBAR) & VTBAR_ENABLED;
- if (igfx_dev && igfx_dev->enabled && gfxvtbar && gfxvten) { + if (is_dev_enabled(igfx_dev) && gfxvtbar && gfxvten) { unsigned long tmp = current;
current += acpi_create_dmar_drhd(current, 0, 0, gfxvtbar); @@ -200,7 +201,7 @@ uint64_t ipuvtbar = MCHBAR64(IPUVTBAR) & VTBAR_MASK; bool ipuvten = MCHBAR32(IPUVTBAR) & VTBAR_ENABLED;
- if (ipu_dev && ipu_dev->enabled && ipuvtbar && ipuvten) { + if (is_dev_enabled(ipu_dev) && ipuvtbar && ipuvten) { unsigned long tmp = current;
current += acpi_create_dmar_drhd(current, 0, 0, ipuvtbar); diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c index 885a6f9..79ce04b 100644 --- a/src/soc/intel/tigerlake/fsp_params.c +++ b/src/soc/intel/tigerlake/fsp_params.c @@ -99,10 +99,7 @@
/* Check if IGD is present and fill Graphics init param accordingly */ dev = pcidev_path_on_root(SA_DEVFN_IGD); - if (CONFIG(RUN_FSP_GOP) && dev && dev->enabled) - params->PeiGraphicsPeimInit = 1; - else - params->PeiGraphicsPeimInit = 0; + params->PeiGraphicsPeimInit = CONFIG(RUN_FSP_GOP) && is_dev_enabled(dev);
/* Use coreboot MP PPI services if Kconfig is enabled */ if (CONFIG(USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI)) { @@ -195,10 +192,8 @@
/* SATA */ dev = pcidev_path_on_root(PCH_DEVFN_SATA); - if (!dev) - params->SataEnable = 0; - else { - params->SataEnable = dev->enabled; + params->SataEnable = is_dev_enabled(dev); + if (params->SataEnable) { params->SataMode = config->SataMode; params->SataSalpSupport = config->SataSalpSupport; memcpy(params->SataPortsEnable, config->SataPortsEnable, @@ -244,37 +239,22 @@
/* LAN */ dev = pcidev_path_on_root(PCH_DEVFN_GBE); - if (!dev) - params->PchLanEnable = 0; - else - params->PchLanEnable = dev->enabled; + params->PchLanEnable = is_dev_enabled(dev);
/* CNVi */ dev = pcidev_path_on_root(PCH_DEVFN_CNVI_WIFI); - if (dev) - params->CnviMode = dev->enabled; - else - params->CnviMode = 0; + params->CnviMode = is_dev_enabled(dev);
/* VMD */ dev = pcidev_path_on_root(SA_DEVFN_VMD); - if (dev) - params->VmdEnable = dev->enabled; - else - params->VmdEnable = 0; + params->VmdEnable = is_dev_enabled(dev);
/* THC */ dev = pcidev_path_on_root(PCH_DEVFN_THC0); - if (!dev) - params->ThcPort0Assignment = 0; - else - params->ThcPort0Assignment = dev->enabled ? THC_0 : THC_NONE; + params->ThcPort0Assignment = is_dev_enabled(dev) ? THC_0 : THC_NONE;
dev = pcidev_path_on_root(PCH_DEVFN_THC1); - if (!dev) - params->ThcPort1Assignment = 0; - else - params->ThcPort1Assignment = dev->enabled ? THC_1 : THC_NONE; + params->ThcPort1Assignment = is_dev_enabled(dev) ? THC_1 : THC_NONE;
/* Legacy 8254 timer support */ params->Enable8254ClockGating = !CONFIG(USE_LEGACY_8254_TIMER); diff --git a/src/soc/intel/tigerlake/romstage/fsp_params.c b/src/soc/intel/tigerlake/romstage/fsp_params.c index b12faec..acb366b 100644 --- a/src/soc/intel/tigerlake/romstage/fsp_params.c +++ b/src/soc/intel/tigerlake/romstage/fsp_params.c @@ -3,6 +3,7 @@ #include <assert.h> #include <console/console.h> #include <cpu/x86/msr.h> +#include <device/device.h> #include <fsp/util.h> #include <intelblocks/cpulib.h> #include <intelblocks/mp_init.h> @@ -21,16 +22,13 @@ uint32_t cpu_id, mask = 0; const struct device *dev;
+ /* + * If IGD is enabled, set IGD stolen size to 60MB. + * Otherwise, skip IGD init in FSP. + */ dev = pcidev_path_on_root(SA_DEVFN_IGD); - if (!dev || !dev->enabled) { - /* Skip IGD initialization in FSP if device is disabled in devicetree.cb */ - m_cfg->InternalGfx = 0; - m_cfg->IgdDvmt50PreAlloc = 0; - } else { - m_cfg->InternalGfx = 1; - /* Set IGD stolen size to 60MB. */ - m_cfg->IgdDvmt50PreAlloc = 0xFE; - } + m_cfg->InternalGfx = is_dev_enabled(dev); + m_cfg->IgdDvmt50PreAlloc = m_cfg->InternalGfx ? 0xFE : 0;
m_cfg->TsegSize = CONFIG_SMM_TSEG_SIZE; m_cfg->IedSize = CONFIG_IED_REGION_SIZE; @@ -76,7 +74,7 @@
/* TraceHub configuration */ dev = pcidev_path_on_root(PCH_DEVFN_TRACEHUB); - if (dev && dev->enabled && config->TraceHubMode) { + if (is_dev_enabled(dev) && config->TraceHubMode) { m_cfg->PcdDebugInterfaceFlags |= DEBUG_INTERFACE_TRACEHUB; m_cfg->PchTraceHubMode = config->TraceHubMode; m_cfg->CpuTraceHubMode = config->TraceHubMode; @@ -87,10 +85,7 @@
/* ISH */ dev = pcidev_path_on_root(PCH_DEVFN_ISH); - if (!dev || !dev->enabled) - m_cfg->PchIshEnable = 0; - else - m_cfg->PchIshEnable = 1; + m_cfg->PchIshEnable = is_dev_enabled(dev);
/* DP port config */ m_cfg->DdiPortAConfig = config->DdiPortAConfig; @@ -119,39 +114,23 @@
/* TCSS DMA */ dev = pcidev_path_on_root(SA_DEVFN_TCSS_DMA0); - if (dev) - m_cfg->TcssDma0En = dev->enabled; - else - m_cfg->TcssDma0En = 0; + m_cfg->TcssDma0En = is_dev_enabled(dev);
dev = pcidev_path_on_root(SA_DEVFN_TCSS_DMA1); - if (dev) - m_cfg->TcssDma1En = dev->enabled; - else - m_cfg->TcssDma1En = 0; + m_cfg->TcssDma1En = is_dev_enabled(dev);
/* USB4/TBT */ dev = pcidev_path_on_root(SA_DEVFN_TBT0); - if (dev) - m_cfg->TcssItbtPcie0En = dev->enabled; - else - m_cfg->TcssItbtPcie0En = 0; + m_cfg->TcssItbtPcie0En = is_dev_enabled(dev); + dev = pcidev_path_on_root(SA_DEVFN_TBT1); - if (dev) - m_cfg->TcssItbtPcie1En = dev->enabled; - else - m_cfg->TcssItbtPcie1En = 0; + m_cfg->TcssItbtPcie1En = is_dev_enabled(dev);
dev = pcidev_path_on_root(SA_DEVFN_TBT2); - if (dev) - m_cfg->TcssItbtPcie2En = dev->enabled; - else - m_cfg->TcssItbtPcie2En = 0; + m_cfg->TcssItbtPcie2En = is_dev_enabled(dev); + dev = pcidev_path_on_root(SA_DEVFN_TBT3); - if (dev) - m_cfg->TcssItbtPcie3En = dev->enabled; - else - m_cfg->TcssItbtPcie3En = 0; + m_cfg->TcssItbtPcie3En = is_dev_enabled(dev);
/* Hyper Threading */ m_cfg->HyperThreading = !config->HyperThreadingDisable; @@ -167,10 +146,7 @@
/* Audio: HDAUDIO_LINK_MODE I2S/SNDW */ dev = pcidev_path_on_root(PCH_DEVFN_HDA); - if (!dev) - m_cfg->PchHdaEnable = 0; - else - m_cfg->PchHdaEnable = dev->enabled; + m_cfg->PchHdaEnable = is_dev_enabled(dev);
m_cfg->PchHdaDspEnable = config->PchHdaDspEnable; m_cfg->PchHdaAudioLinkHdaEnable = config->PchHdaAudioLinkHdaEnable;
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43897 )
Change subject: soc/intel/tigerlake: Simplify is-device-enabled checks ......................................................................
Patch Set 8:
Michael, please do not submit out of order. Especially not when a preceding commit does the same and has open comments. It's very tedious to put the same comment on half a dozen of patches.
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Angel Pons (Code Review) -
Felix Singer (Code Review)
-
Michael Niewöhner (Code Review)
-
Nico Huber (Code Review)
-
Tim Wawrzynczak (Code Review)