Change in ...coreboot[master]: soc/amd/common: Remove redundant ACPI S3 test

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/27276 )

Change subject: soc/amd/common: Remove redundant ACPI S3 test
......................................................................

soc/amd/common: Remove redundant ACPI S3 test

Possible allowance to do wakeup is already evaluated
early in romstage, so these tests are redundant.

Change-Id: I7c7a9ecbfcb82790e477d906a00f9749103b4045
Signed-off-by: Kyösti Mälkki 
Reviewed-on: https://review.coreboot.org/c/27276
Reviewed-by: Paul Menzel 
Reviewed-by: Marshall Dawson 
Reviewed-by: Richard Spiegel 
Tested-by: build bot (Jenkins) 
---
M src/soc/amd/common/block/pi/agesawrapper.c
M src/soc/amd/stoneyridge/Kconfig
M src/soc/amd/stoneyridge/chip.c
3 files changed, 4 insertions(+), 11 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Paul Menzel: Looks good to me, but someone else must approve
  Marshall Dawson: Looks good to me, approved
  Richard Spiegel: Looks good to me, approved

diff --git a/src/soc/amd/common/block/pi/agesawrapper.c b/src/soc/amd/common/block/pi/agesawrapper.c
index e12c8e9..0fcb93e 100644
--- a/src/soc/amd/common/block/pi/agesawrapper.c
+++ b/src/soc/amd/common/block/pi/agesawrapper.c
@@ -422,9 +422,6 @@
    };
    size_t nv_size;

-	if (!acpi_s3_resume_allowed())
-		return AGESA_UNSUPPORTED;
-
    AMD_RESUME_PARAMS *InitResumeParams = create_struct(&AmdParamStruct);

get_s3nv_info(&InitResumeParams->S3DataBlock.NvStorage, &nv_size);
@@ -453,9 +450,6 @@
    };
    size_t vol_size;

-	if (!acpi_s3_resume_allowed())
-		return AGESA_UNSUPPORTED;
-
    amd_initcpuio();

AMD_S3LATE_PARAMS *S3LateParams = create_struct(&AmdParamStruct);
@@ -488,9 +482,6 @@
    };
    size_t vol_size;

-	if (!acpi_s3_resume_allowed())
-		return AGESA_UNSUPPORTED;
-
    AMD_S3FINAL_PARAMS *S3FinalParams = create_struct(&AmdParamStruct);

get_s3vol_info(&S3FinalParams->S3DataBlock.VolatileStorage, &vol_size);
diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
index 80798d9..143aabe 100644
--- a/src/soc/amd/stoneyridge/Kconfig
+++ b/src/soc/amd/stoneyridge/Kconfig
@@ -50,7 +50,7 @@
    select SOC_AMD_COMMON_BLOCK_PI
    select SOC_AMD_COMMON_BLOCK_PSP
    select SOC_AMD_COMMON_BLOCK_CAR
-	select SOC_AMD_COMMON_BLOCK_S3 if HAVE_ACPI_RESUME
+	select SOC_AMD_COMMON_BLOCK_S3
    select C_ENVIRONMENT_BOOTBLOCK
    select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH
    select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
diff --git a/src/soc/amd/stoneyridge/chip.c b/src/soc/amd/stoneyridge/chip.c
index 9743aa9..a29c56c 100644
--- a/src/soc/amd/stoneyridge/chip.c
+++ b/src/soc/amd/stoneyridge/chip.c
@@ -155,7 +155,9 @@

static void earliest_ramstage(void *unused)
 {
-	if (!romstage_handoff_is_resume()) {
+	int s3_resume = acpi_s3_resume_allowed() &&
+			romstage_handoff_is_resume();
+	if (!s3_resume) {
    	post_code(0x46);
    	if (IS_ENABLED(CONFIG_SOC_AMD_PSP_SELECTABLE_SMU_FW))
    		psp_load_named_blob(MBOX_BIOS_CMD_SMU_FW2, "smu_fw2");