New patch to review for coreboot: nvidia southbridges: don't touch 0x78 in LPC bridge with Fam10h
Jonathan A. Kollasch (jakllsch@kollasch.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10984
-gerrit
commit f27d88d0fbd4ea896a697cb0c4e08afb7aaaa1c9 Author: Jonathan A. Kollasch jakllsch@kollasch.net Date: Mon Jul 20 09:51:34 2015 -0500
nvidia southbridges: don't touch 0x78 in LPC bridge with Fam10h
Based on the observations that AMD Fam10h with both Nvidia CK804 (Asus KFSN4-DRE) and MCP55 (Sun Ultra 40 M2) need to avoid adjusting the LPC bridge register 0x78 (particularly the 0x7b byte) to get to ramstage: Assume that there's something about this register that adjusting it the way we do for K8 is something that can/should be universally avoided on all Fam10h systems with these chipsets.
Change-Id: I1eceeb20ecaefef4c61c11e19d1f5a59f91a0a2f Signed-off-by: Jonathan A. Kollasch jakllsch@kollasch.net --- src/mainboard/asus/kfsn4-dre/romstage.c | 9 --------- src/southbridge/nvidia/ck804/early_setup.c | 14 ++++++++++++++ src/southbridge/nvidia/ck804/early_setup_car.c | 14 +++++++++++++- src/southbridge/nvidia/mcp55/early_setup_car.c | 7 +++++++ 4 files changed, 34 insertions(+), 10 deletions(-)
diff --git a/src/mainboard/asus/kfsn4-dre/romstage.c b/src/mainboard/asus/kfsn4-dre/romstage.c index aa72021..cf36a72 100644 --- a/src/mainboard/asus/kfsn4-dre/romstage.c +++ b/src/mainboard/asus/kfsn4-dre/romstage.c @@ -67,15 +67,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c"
-/* - * Avoid crash (complete with severe memory corruption!) during initial CAR boot - * in ck804_early_setup_x(). - * Interestingly once the system is fully booted into Linux this can be set, but - * not before! Apparently something isn't initialized but the amount of effort - * required to fix this is non-negligible and of unknown real-world benefit - */ -#define CK804_SKIP_PCI_REG_78_INIT 1 - #define CK804_MB_SETUP \ RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+33, ~(0x0f),(0x04 | 0x01), /* -ENOINFO Proprietary BIOS sets this register; "When in Rome..."*/
diff --git a/src/southbridge/nvidia/ck804/early_setup.c b/src/southbridge/nvidia/ck804/early_setup.c index c0a8766..9c0a783 100644 --- a/src/southbridge/nvidia/ck804/early_setup.c +++ b/src/southbridge/nvidia/ck804/early_setup.c @@ -152,10 +152,24 @@ static void ck804_early_setup(void) RES_PCI_IO, PCI_ADDR(CK804B_BUSN, CK804B_DEVN_BASE + 9, 0, 0x74), 0xffffffc0, 0x00000000, #endif
+#if IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_AMDFAM10) + /* + * Avoid crash (complete with severe memory corruption!) during initial CAR boot + * in ck804_early_setup_x() on Fam10h systems by not touching 0x78. + * Interestingly once the system is fully booted into Linux this can be set, but + * not before! Apparently something isn't initialized but the amount of effort + * required to fix this is non-negligible and of unknown real-world benefit + */ +#else RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE + 1, 0, 0x78), 0xc0ffffff, 0x19000000, +#endif RES_PCI_IO, PCI_ADDR(0, CK804_DEVN_BASE + 1, 0, 0xe0), 0xfffffeff, 0x00000100,
#if CONFIG_CK804_NUM > 1 + /* + * Avoid touching 0x78 for CONFIG_NORTHBRIDGE_AMD_AMDFAM10 for + * non-primary chain too??? + */ RES_PCI_IO, PCI_ADDR(CK804B_BUSN, CK804B_DEVN_BASE + 1, 0, 0x78), 0xc0ffffff, 0x20000000, RES_PCI_IO, PCI_ADDR(CK804B_BUSN, CK804B_DEVN_BASE + 1, 0, 0xe0), 0xfffffeff, 0x00000000, RES_PCI_IO, PCI_ADDR(CK804B_BUSN, CK804B_DEVN_BASE + 1, 0, 0xe8), 0xffffff00, 0x000000ff, diff --git a/src/southbridge/nvidia/ck804/early_setup_car.c b/src/southbridge/nvidia/ck804/early_setup_car.c index 8065d20..87fdbdd 100644 --- a/src/southbridge/nvidia/ck804/early_setup_car.c +++ b/src/southbridge/nvidia/ck804/early_setup_car.c @@ -142,7 +142,15 @@ static void ck804_early_setup(unsigned ck804_num, unsigned *busn, CK804_MB_SETUP #endif
-#ifndef CK804_SKIP_PCI_REG_78_INIT +#if IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_AMDFAM10) + /* + * Avoid crash (complete with severe memory corruption!) during initial CAR boot + * in ck804_early_setup_x() on Fam10h systems by not touching 0x78. + * Interestingly once the system is fully booted into Linux this can be set, but + * not before! Apparently something isn't initialized but the amount of effort + * required to fix this is non-negligible and of unknown real-world benefit + */ +#else RES_PCI_IO, PCI_ADDR(0, 1, 0, 0x78), 0xc0ffffff, 0x19000000, #endif RES_PCI_IO, PCI_ADDR(0, 1, 0, 0xe0), 0xfffffeff, 0x00000100, @@ -239,6 +247,10 @@ static void ck804_early_setup(unsigned ck804_num, unsigned *busn, RES_PCI_IO, PCI_ADDR(0, 9, 0, 0x4c), 0xfe00ffff, 0x00440000, RES_PCI_IO, PCI_ADDR(0, 9, 0, 0x74), 0xffffffc0, 0x00000000,
+ /* + * Avoid touching 0x78 for CONFIG_NORTHBRIDGE_AMD_AMDFAM10 for + * non-primary chains too??? + */ RES_PCI_IO, PCI_ADDR(0, 1, 0, 0x78), 0xc0ffffff, 0x20000000, RES_PCI_IO, PCI_ADDR(0, 1, 0, 0xe0), 0xfffffeff, 0x00000000, RES_PCI_IO, PCI_ADDR(0, 1, 0, 0xe8), 0xffffff00, 0x000000ff, diff --git a/src/southbridge/nvidia/mcp55/early_setup_car.c b/src/southbridge/nvidia/mcp55/early_setup_car.c index 4970a4c..1c0df10 100644 --- a/src/southbridge/nvidia/mcp55/early_setup_car.c +++ b/src/southbridge/nvidia/mcp55/early_setup_car.c @@ -242,7 +242,14 @@ static void mcp55_early_setup(unsigned mcp55_num, unsigned *busn, RES_PCI_IO, PCI_ADDR(0, 6, 0, 0x74), 0xFFFFFFC0, 0x00000000, RES_PCI_IO, PCI_ADDR(0, 6, 0, 0xC0), 0x00000000, 0xCB8410DE, RES_PCI_IO, PCI_ADDR(0, 6, 0, 0xC4), 0xFFFFFFF8, 0x00000007, +#if IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_AMDFAM10) + /* + * Touching BUID+1.0 0x78 this way this early on Fam10h systems + * causes unrecoverable issues during CAR. + */ +#else RES_PCI_IO, PCI_ADDR(0, 1, 0, 0x78), 0xC0FFFFFF, 0x19000000, +#endif
#if CONFIG_MCP55_USE_AZA RES_PCI_IO, PCI_ADDR(0, 6, 1, 0x40), 0x00000000, 0xCB8410DE,
-
Jonathan A. Kollasch