Change in coreboot[master]: mb/google/volteer: add Audio changes for Max98357a & ALC5682I
Nick Vaccaro has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39356 )
Change subject: mb/google/volteer: add Audio changes for Max98357a & ALC5682I ......................................................................
mb/google/volteer: add Audio changes for Max98357a & ALC5682I
Add support for MAX98357a amplifier and ALC5682I codec on volteer.
BUG=b:144708516, b:148385924 TEST=none
Change-Id: I225faac68729b28be65b4d8f1f83769a874f84ff Signed-off-by: Nick Vaccaro nvaccaro@google.com --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 14 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/39356/1
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index d44975f..65df68c 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -107,6 +107,20 @@ [PchSerialIoIndexUART2] = PchSerialIoDisabled, }"
+ # HD Audio + register "PchHdaDspEnable" = "1" + register "PchHdaAudioLinkHdaEnable" = "0" + register "PchHdaAudioLinkDmicEnable[0]" = "1" + register "PchHdaAudioLinkDmicEnable[1]" = "1" + register "PchHdaAudioLinkSspEnable[0]" = "1" + register "PchHdaAudioLinkSspEnable[1]" = "1" + # iDisp-Link T-Mode 0: 2T, 2: 4T, 3: 8T, 4: 16T + register "PchHdaIDispLinkTmode" = "2" + # iDisp-Link Freq 4: 96MHz, 3: 48MHz. + register "PchHdaIDispLinkFrequency" = "4" + # Not disconnected/enumerable + register "PchHdaIDispCodecDisconnect" = "0" + # DP port register "DdiPortAConfig" = "1" # eDP register "DdiPortBConfig" = "0"
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39356 )
Change subject: mb/google/volteer: add Audio changes for Max98357a & ALC5682I ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39356/2/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/39356/2/src/mainboard/google/voltee... PS2, Line 121: # iDisp-Link T-Mode 0: 2T, 2: 4T, 3: 8T, 4: 16T : register "PchHdaIDispLinkTmode" = "2" : # iDisp-Link Freq 4: 96MHz, 3: 48MHz. : register "PchHdaIDispLinkFrequency" = "4" : # Not disconnected/enumerable : register "PchHdaIDispCodecDisconnect" = "0" Posted this on earlier CL. I don't think this is correct. Please check with Curtis on this.
Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39356 )
Change subject: mb/google/volteer: add Audio changes for Max98357a & ALC5682I ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39356/2/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/39356/2/src/mainboard/google/voltee... PS2, Line 121: # iDisp-Link T-Mode 0: 2T, 2: 4T, 3: 8T, 4: 16T : register "PchHdaIDispLinkTmode" = "2" : # iDisp-Link Freq 4: 96MHz, 3: 48MHz. : register "PchHdaIDispLinkFrequency" = "4" : # Not disconnected/enumerable : register "PchHdaIDispCodecDisconnect" = "0"
Posted this on earlier CL. I don't think this is correct. Please check with Curtis on this.
Thanks, will do.
Hello build bot (Jenkins), Srinidhi N Kaushik,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39356
to look at the new patch set (#5).
Change subject: mb/google/volteer: add audio changes for Max98357a & ALC5682I ......................................................................
mb/google/volteer: add audio changes for Max98357a & ALC5682I
Add support for MAX98357a amplifier and ALC5682I codec on volteer.
BUG=b:144708516, b:148385924 TEST=none
Change-Id: I225faac68729b28be65b4d8f1f83769a874f84ff Signed-off-by: Nick Vaccaro nvaccaro@google.com --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 14 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/39356/5
Sathyanarayana Nujella has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39356 )
Change subject: mb/google/volteer: add audio changes for Max98357a & ALC5682I ......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39356/6//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39356/6//COMMIT_MSG@7 PS6, Line 7: mb/google/volteer: add audio changes for Max98357a & ALC5682I changes in devicetree are only enabling audiodsp. We don't see related to codec configurations.
Can the description in patch be changed to "Enabling Audio DSP UPD config's" ?
Hello Sathyanarayana Nujella, build bot (Jenkins), Srinidhi N Kaushik,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39356
to look at the new patch set (#7).
Change subject: mb/google/volteer: Enabling Audio DSP UPD configs ......................................................................
mb/google/volteer: Enabling Audio DSP UPD configs
BUG=b:144708516, b:148385924 TEST=none
Change-Id: I225faac68729b28be65b4d8f1f83769a874f84ff Signed-off-by: Nick Vaccaro nvaccaro@google.com --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 14 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/39356/7
Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39356 )
Change subject: mb/google/volteer: Enabling Audio DSP UPD configs ......................................................................
Patch Set 7:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39356/6//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39356/6//COMMIT_MSG@7 PS6, Line 7: mb/google/volteer: add audio changes for Max98357a & ALC5682I
changes in devicetree are only enabling audiodsp. We don't see related to codec configurations. […]
Done
Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39356 )
Change subject: mb/google/volteer: Enabling Audio DSP UPD configs ......................................................................
Patch Set 7:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39356/2/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/39356/2/src/mainboard/google/voltee... PS2, Line 121: # iDisp-Link T-Mode 0: 2T, 2: 4T, 3: 8T, 4: 16T : register "PchHdaIDispLinkTmode" = "2" : # iDisp-Link Freq 4: 96MHz, 3: 48MHz. : register "PchHdaIDispLinkFrequency" = "4" : # Not disconnected/enumerable : register "PchHdaIDispCodecDisconnect" = "0"
Thanks, will do.
I spoke to Curtis and asked him to take a look, he said "Looked at the CL, I don't have enough knowledge around iDisp and coreboot to comment, I recommend talking to Sathyanarayana Nujella at Intel". I added Sathyanarayana as a reviewer.
Sathyanarayana Nujella has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39356 )
Change subject: mb/google/volteer: Enabling Audio DSP UPD configs ......................................................................
Patch Set 7: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/39356/2/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/39356/2/src/mainboard/google/voltee... PS2, Line 121: # iDisp-Link T-Mode 0: 2T, 2: 4T, 3: 8T, 4: 16T : register "PchHdaIDispLinkTmode" = "2" : # iDisp-Link Freq 4: 96MHz, 3: 48MHz. : register "PchHdaIDispLinkFrequency" = "4" : # Not disconnected/enumerable : register "PchHdaIDispCodecDisconnect" = "0"
I spoke to Curtis and asked him to take a look, he said "Looked at the CL, I don't have enough knowl […]
These iDisp paramters are related to configuration for the link between HD-Audio controller and Display unit for purposes of HDMI/DP Audio playback. During PO, we observed that without setting these params display part was not binding.
Srinidhi: Can you please comment if any?
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39356 )
Change subject: mb/google/volteer: Enabling Audio DSP UPD configs ......................................................................
Patch Set 7:
(2 comments)
https://review.coreboot.org/c/coreboot/+/39356/7//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39356/7//COMMIT_MSG@7 PS7, Line 7: Enabling Imperative mood: Enable
https://review.coreboot.org/c/coreboot/+/39356/7//COMMIT_MSG@8 PS7, Line 8: Please elaborate.
Hello Sathyanarayana Nujella, build bot (Jenkins), Srinidhi N Kaushik,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39356
to look at the new patch set (#8).
Change subject: mb/google/volteer: Enable Audio DSP UPD configs ......................................................................
mb/google/volteer: Enable Audio DSP UPD configs
Provide settings for configuring the link between HD-Audio controller and display unit for purposes of HDMI/DP Audio playback.
BUG=b:144708516, b:148385924 TEST=none
Change-Id: I225faac68729b28be65b4d8f1f83769a874f84ff Signed-off-by: Nick Vaccaro nvaccaro@google.com --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 14 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/39356/8
Hello Sathyanarayana Nujella, build bot (Jenkins), Srinidhi N Kaushik,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39356
to look at the new patch set (#9).
Change subject: mb/google/volteer: Enable Audio DSP UPD ......................................................................
mb/google/volteer: Enable Audio DSP UPD
Provide settings for configuring the link between HD-Audio controller and display unit for purposes of HDMI/DP Audio playback.
BUG=b:144708516, b:148385924 TEST=none
Change-Id: I225faac68729b28be65b4d8f1f83769a874f84ff Signed-off-by: Nick Vaccaro nvaccaro@google.com --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 14 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/39356/9
Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39356 )
Change subject: mb/google/volteer: Enable Audio DSP UPD ......................................................................
Patch Set 9:
(2 comments)
https://review.coreboot.org/c/coreboot/+/39356/7//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39356/7//COMMIT_MSG@7 PS7, Line 7: Enabling
Imperative mood: Enable
Done
https://review.coreboot.org/c/coreboot/+/39356/7//COMMIT_MSG@8 PS7, Line 8:
Please elaborate.
Done
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39356 )
Change subject: mb/google/volteer: Enable Audio DSP UPD ......................................................................
Patch Set 9:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39356/2/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/39356/2/src/mainboard/google/voltee... PS2, Line 121: # iDisp-Link T-Mode 0: 2T, 2: 4T, 3: 8T, 4: 16T : register "PchHdaIDispLinkTmode" = "2" : # iDisp-Link Freq 4: 96MHz, 3: 48MHz. : register "PchHdaIDispLinkFrequency" = "4" : # Not disconnected/enumerable : register "PchHdaIDispCodecDisconnect" = "0"
These iDisp paramters are related to configuration for the link between HD-Audio controller and Disp […]
Srinidhi, can you please confirm this.
Hello Sathyanarayana Nujella, build bot (Jenkins), Srinidhi N Kaushik,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39356
to look at the new patch set (#11).
Change subject: mb/google/volteer: Enable Audio DSP UPD ......................................................................
mb/google/volteer: Enable Audio DSP UPD
Provide settings for configuring the link between HD-Audio controller and display unit for purposes of HDMI/DP Audio playback.
BUG=b:144708516, b:148385924 TEST=none
Change-Id: I225faac68729b28be65b4d8f1f83769a874f84ff Signed-off-by: Nick Vaccaro nvaccaro@google.com --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 15 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/39356/11
Srinidhi N Kaushik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39356 )
Change subject: mb/google/volteer: Enable Audio DSP UPD ......................................................................
Patch Set 11:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39356/2/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/39356/2/src/mainboard/google/voltee... PS2, Line 121: # iDisp-Link T-Mode 0: 2T, 2: 4T, 3: 8T, 4: 16T : register "PchHdaIDispLinkTmode" = "2" : # iDisp-Link Freq 4: 96MHz, 3: 48MHz. : register "PchHdaIDispLinkFrequency" = "4" : # Not disconnected/enumerable : register "PchHdaIDispCodecDisconnect" = "0"
Srinidhi, can you please confirm this.
Yes, as I remember this was the case on tglrvp. We needed this settings for HDMI/DP Audio palyback to work. We need to double check on volteer though. Furquan, do you think we dont need this change for volteer ?
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39356 )
Change subject: mb/google/volteer: Enable Audio DSP UPD ......................................................................
Patch Set 11:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39356/2/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/39356/2/src/mainboard/google/voltee... PS2, Line 121: # iDisp-Link T-Mode 0: 2T, 2: 4T, 3: 8T, 4: 16T : register "PchHdaIDispLinkTmode" = "2" : # iDisp-Link Freq 4: 96MHz, 3: 48MHz. : register "PchHdaIDispLinkFrequency" = "4" : # Not disconnected/enumerable : register "PchHdaIDispCodecDisconnect" = "0"
Yes, as I remember this was the case on tglrvp. […]
We have never configured this before on previous platforms. I see that CML had the same UPDs but we never really touched those. So, I would like to understand if these are really required for volteer or if it is just the TGLRVP hardware configuration because of which you need it on tglrvp.
Can you check internally under what circumstances these UPDs need to be set? I couldn't find much documentation on this in EDS or FSP headers.
Srinidhi N Kaushik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39356 )
Change subject: mb/google/volteer: Enable Audio DSP UPD ......................................................................
Patch Set 11:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39356/2/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/39356/2/src/mainboard/google/voltee... PS2, Line 121: # iDisp-Link T-Mode 0: 2T, 2: 4T, 3: 8T, 4: 16T : register "PchHdaIDispLinkTmode" = "2" : # iDisp-Link Freq 4: 96MHz, 3: 48MHz. : register "PchHdaIDispLinkFrequency" = "4" : # Not disconnected/enumerable : register "PchHdaIDispCodecDisconnect" = "0"
We have never configured this before on previous platforms. […]
Sure, also we will confirm if these settings are needed on volteer.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39356 )
Change subject: mb/google/volteer: Enable Audio DSP UPD ......................................................................
Patch Set 12:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39356/2/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/39356/2/src/mainboard/google/voltee... PS2, Line 121: # iDisp-Link T-Mode 0: 2T, 2: 4T, 3: 8T, 4: 16T : register "PchHdaIDispLinkTmode" = "2" : # iDisp-Link Freq 4: 96MHz, 3: 48MHz. : register "PchHdaIDispLinkFrequency" = "4" : # Not disconnected/enumerable : register "PchHdaIDispCodecDisconnect" = "0"
Sure, also we will confirm if these settings are needed on volteer.
Any update here?
Sathyanarayana Nujella has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39356 )
Change subject: mb/google/volteer: Enable Audio DSP UPD ......................................................................
Patch Set 12:
+Jairaj
Need to experiment and see impact on HDMI and to see if these params are now taken care by FSP (so that they don't need to be set from devicetree).
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39356 )
Change subject: mb/google/volteer: Enable Audio DSP UPD ......................................................................
Patch Set 12:
(1 comment)
Patch Set 12:
+Jairaj
Need to experiment and see impact on HDMI and to see if these params are now taken care by FSP (so that they don't need to be set from devicetree).
In the interest of
https://review.coreboot.org/c/coreboot/+/39356/2/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/39356/2/src/mainboard/google/voltee... PS2, Line 121: # iDisp-Link T-Mode 0: 2T, 2: 4T, 3: 8T, 4: 16T : register "PchHdaIDispLinkTmode" = "2" : # iDisp-Link Freq 4: 96MHz, 3: 48MHz. : register "PchHdaIDispLinkFrequency" = "4" : # Not disconnected/enumerable : register "PchHdaIDispCodecDisconnect" = "0"
Any update here?
Let's push this in. I don't think this configuration is correct based on my reading of I-Display and seeing how this was disabled for Chrome OS platforms before. Anyways, let's continue discussion here: b/151451125. Srinidhi/Sathya/Jairaj -- Can you please help follow-up on the bug?
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39356 )
Change subject: mb/google/volteer: Enable Audio DSP UPD ......................................................................
Patch Set 12: Code-Review+2
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39356 )
Change subject: mb/google/volteer: Enable Audio DSP UPD ......................................................................
Patch Set 12:
(2 comments)
https://review.coreboot.org/c/coreboot/+/39356/6//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39356/6//COMMIT_MSG@7 PS6, Line 7: mb/google/volteer: add audio changes for Max98357a & ALC5682I
Done
Done
https://review.coreboot.org/c/coreboot/+/39356/2/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/39356/2/src/mainboard/google/voltee... PS2, Line 121: # iDisp-Link T-Mode 0: 2T, 2: 4T, 3: 8T, 4: 16T : register "PchHdaIDispLinkTmode" = "2" : # iDisp-Link Freq 4: 96MHz, 3: 48MHz. : register "PchHdaIDispLinkFrequency" = "4" : # Not disconnected/enumerable : register "PchHdaIDispCodecDisconnect" = "0"
Let's push this in. […]
Done
Furquan Shaikh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/39356 )
Change subject: mb/google/volteer: Enable Audio DSP UPD ......................................................................
mb/google/volteer: Enable Audio DSP UPD
Provide settings for configuring the link between HD-Audio controller and display unit for purposes of HDMI/DP Audio playback.
BUG=b:144708516, b:148385924 TEST=none
Change-Id: I225faac68729b28be65b4d8f1f83769a874f84ff Signed-off-by: Nick Vaccaro nvaccaro@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/39356 Reviewed-by: Furquan Shaikh furquan@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 15 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index a65e5f1..84d121f 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -110,6 +110,21 @@ [PchSerialIoIndexUART2] = PchSerialIoDisabled, }"
+ # HD Audio + register "PchHdaDspEnable" = "1" + register "PchHdaAudioLinkHdaEnable" = "0" + register "PchHdaAudioLinkDmicEnable[0]" = "1" + register "PchHdaAudioLinkDmicEnable[1]" = "1" + register "PchHdaAudioLinkSspEnable[0]" = "1" + register "PchHdaAudioLinkSspEnable[1]" = "1" + # iDisp-Link T-Mode 0: 2T, 2: 4T, 3: 8T, 4: 16T + register "PchHdaIDispLinkTmode" = "2" + # iDisp-Link Freq 4: 96MHz, 3: 48MHz. + register "PchHdaIDispLinkFrequency" = "4" + # Not disconnected/enumerable + register "PchHdaIDispCodecDisconnect" = "0" + + # TCSS USB3 register "TcssXhciEn" = "1"
Sathyanarayana Nujella has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39356 )
Change subject: mb/google/volteer: Enable Audio DSP UPD ......................................................................
Patch Set 13:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39356/2/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/baseboard/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/39356/2/src/mainboard/google/voltee... PS2, Line 126: register "PchHdaIDispCodecDisconnect" = "0" Sure Furquan, thank you!
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39356 )
Change subject: mb/google/volteer: Enable Audio DSP UPD ......................................................................
Patch Set 13:
Automatic boot test returned (PASS/FAIL/TOTAL): 3/0/3 Emulation targets: EMULATION_QEMU_X86_Q35 using payload TianoCore : SUCCESS : https://lava.9esec.io/r/1337 EMULATION_QEMU_X86_Q35 using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/1336 EMULATION_QEMU_X86_I440FX using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/1335
Please note: This test is under development and might not be accurate at all!
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9elements QA (Code Review) -
Furquan Shaikh (Code Review)
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Nick Vaccaro (Code Review)
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Paul Menzel (Code Review)
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Sathyanarayana Nujella (Code Review)
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Srinidhi N Kaushik (Code Review)