Jose S. Cofreros Jr. has uploaded this change for review. ( https://review.coreboot.org/28547
Change subject: Enabled USB Power on Leaf Hill CRB. ......................................................................
Enabled USB Power on Leaf Hill CRB.
1) Enabled USB Power on Leaf Hill CRB to use keyboard and mouse. Verified on Windows 10 Pro 10.0.17134 Build 17134. 2) Modified the following documentation that is blocking the original intent of this commit. - Verify that the word 'coreboot' is lowercase (lint-stable-021-coreboot-lowercase) - Documentation/Intel/SoC/quark.html - Documentation/Intel/SoC/soc.html - Documentation/Intel/development.html - Documentation/Intel/index.html
Change-Id: I808d48789506123d544647ef3eefc0ea064d89a2 Signed-off-by: Jose S. Cofreros Jr josh.cofreros@gmail.com --- M Documentation/Intel/SoC/quark.html M Documentation/Intel/SoC/soc.html M Documentation/Intel/development.html M Documentation/Intel/index.html M src/mainboard/intel/leafhill/brd_gpio.h 5 files changed, 31 insertions(+), 26 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/28547/1
diff --git a/Documentation/Intel/SoC/quark.html b/Documentation/Intel/SoC/quark.html index c3eead2..1575c07 100644 --- a/Documentation/Intel/SoC/quark.html +++ b/Documentation/Intel/SoC/quark.html @@ -19,7 +19,7 @@ <li><a target="_blank" href="../fsp1_1.html">FSP 1.1</a> integration</li> <li><a target="_blank" href="../Board/board.html">Board</a> support</li> <li><a target="_blank" href="#QuarkFsp">Quark™ FSP</a></li> - <li><a target="_blank" href="#CorebootPayloadPkg">CorebootPayloadPkg</a></li> + <li><a target="_blank" href="#corebootPayloadPkg">corebootPayloadPkg</a></li> </ul> </td> </tr> @@ -49,23 +49,23 @@
<hr> -<h2><a name="CorebootPayloadPkg">Quark™ EDK2 CorebootPayloadPkg</a></h2> +<h2><a name="corebootPayloadPkg">Quark™ EDK2 corebootPayloadPkg</a></h2> <p> Build Instructions: </p> <ol> <li>Set up <a href="#BuildEnvironment">build environment</a></li> <li>Linux (assumes GCC48): -<pre><code>build -p CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc -a IA32 \ +<pre><code>build -p corebootPayloadPkg/corebootPayloadPkgIa32.dsc -a IA32 \ -t GCC48 -b DEBUG -DDEBUG_PROPERTY_MASK=0x27 \ -DDEBUG_PRINT_ERROR_LEVEL=0x80000042 -DSHELL_TYPE=BUILD_SHELL \ -DMAX_LOGICAL_PROCESSORS=1 -ls Build/CorebootPayloadPkgIA32/DEBUG_GCC48/FV/UEFIPAYLOAD.fd +ls Build/corebootPayloadPkgIA32/DEBUG_GCC48/FV/UEFIPAYLOAD.fd </code></pre> </li> <li>Windows (assumes Visual Studio 2015): -<pre><code>build -p CorebootPayloadPkg\CorebootPayloadPkgIa32.dsc -a IA32 -t VS2015x86 -b DEBUG -DDEBUG_PROPERTY_MASK=0x27 -DDEBUG_PRINT_ERROR_LEVEL=0x80000042 -DSHELL_TYPE=BUILD_SHELL -DMAX_LOGICAL_PROCESSORS=1 -dir Build\CorebootPayloadPkgIA32\DEBUG_VS2015x86\FV\UEFIPAYLOAD.fd +<pre><code>build -p corebootPayloadPkg\corebootPayloadPkgIa32.dsc -a IA32 -t VS2015x86 -b DEBUG -DDEBUG_PROPERTY_MASK=0x27 -DDEBUG_PRINT_ERROR_LEVEL=0x80000042 -DSHELL_TYPE=BUILD_SHELL -DMAX_LOGICAL_PROCESSORS=1 +dir Build\corebootPayloadPkgIA32\DEBUG_VS2015x86\FV\UEFIPAYLOAD.fd </code></pre> </li> <li>In the .config for coreboot, set the following Kconfig values: diff --git a/Documentation/Intel/SoC/soc.html b/Documentation/Intel/SoC/soc.html index 29b819e..a796b85 100644 --- a/Documentation/Intel/SoC/soc.html +++ b/Documentation/Intel/SoC/soc.html @@ -572,18 +572,18 @@ <hr> <h2><a name="AcpiTables">ACPI Tables</a></h2> <p> - One of the payloads that needs ACPI tables is the EDK2 <a target="_blank" href="quark.html#CorebootPayloadPkg">CorebootPayloadPkg</a>. + One of the payloads that needs ACPI tables is the EDK2 <a target="_blank" href="quark.html#corebootPayloadPkg">corebootPayloadPkg</a>. </p>
<h3>FADT</h3> <p> The EDK2 module - CorebootModulePkg/Library/CbParseLib/<a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootModulePkg/Library/CbParseLib/CbParseLib.c#l450">CbParseLib.c</a> + corebootModulePkg/Library/CbParseLib/<a target="_blank" href="https://github.com/tianocore/edk2/blob/master/corebootModulePkg/Library/CbParseLib/CbParseLib.c#l450">CbParseLib.c</a> requires that the FADT contains the values in the table below. These values are placed into a HOB identified by - <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootModulePkg/CorebootModulePkg.dec#l36">gUefiAcpiBoardInfoGuid</a> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/corebootModulePkg/corebootModulePkg.dec#l36">gUefiAcpiBoardInfoGuid</a> by routine - CorebootModulePkg/CbSupportPei/CbSupportPei/<a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootModulePkg/CbSupportPei/CbSupportPei.c#l364">CbPeiEntryPoint</a>. + corebootModulePkg/CbSupportPei/CbSupportPei/<a target="_blank" href="https://github.com/tianocore/edk2/blob/master/corebootModulePkg/CbSupportPei/CbSupportPei.c#l364">CbPeiEntryPoint</a>. </p> <table border="1"> <tr bgcolor="#c0ffc0"> @@ -600,9 +600,9 @@ <td>gpe0_blk<br>gpe0_blk_len</td> <td>Gpe0Blk<br>Gpe0BlkLen</td> <td> - <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootModulePkg/Library/CbParseLib/CbParseLib.c#l477">PmGpeEnBase</a> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/corebootModulePkg/Library/CbParseLib/CbParseLib.c#l477">PmGpeEnBase</a> </td> - <td><a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l129">Shutdown</a></td> + <td><a target="_blank" href="https://github.com/tianocore/edk2/blob/master/corebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l129">Shutdown</a></td> <td>4.8.4.1</td> </tr> <tr> @@ -610,8 +610,8 @@ <td>Pm1aCntBlk</td> <td>PmCtrlRegBase</td> <td> - <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l139">Shutdown</a><br> - <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l40">Suspend</a> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/corebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l139">Shutdown</a><br> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/corebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l40">Suspend</a> </td> <td>4.8.3.2.1</td> </tr> @@ -619,7 +619,7 @@ <td>pm1a_evt_blk</td> <td>Pm1aEvtBlk</td> <td>PmEvtBase</td> - <td><a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l134">Shutdown</a></td> + <td><a target="_blank" href="https://github.com/tianocore/edk2/blob/master/corebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l134">Shutdown</a></td> <td>4.8.3.1.1</td> </tr> <tr> @@ -627,7 +627,7 @@ <td>PmTmrBlk</td> <td>PmTimerRegBase</td> <td> - <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/AcpiTimerLib/AcpiTimerLib.c#l55">Timer</a> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/corebootPayloadPkg/Library/AcpiTimerLib/AcpiTimerLib.c#l55">Timer</a> </td> <td>4.8.3.3</td> </tr> @@ -636,9 +636,9 @@ <td>ResetReg.Address</td> <td>ResetRegAddress</td> <td> - <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l71">Cold</a> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/corebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l71">Cold</a> and - <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l98">Warm</a> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/corebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l98">Warm</a> resets </td> <td>4.3.3.6</td> @@ -648,9 +648,9 @@ <td>ResetValue</td> <td>ResetValue</td> <td> - <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l71">Cold</a> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/corebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l71">Cold</a> and - <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/CorebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l98">Warm</a> + <a target="_blank" href="https://github.com/tianocore/edk2/blob/master/corebootPayloadPkg/Library/ResetSystemLib/ResetSystemLib.c#l98">Warm</a> resets </td> <td>4.8.3.6</td> @@ -680,7 +680,7 @@ <hr> <h2><a name="LegacyHardware">Legacy Hardware</a></h2> <p> - One of the payloads that needs legacy hardare is the EDK2 <a target="_blank" href="quark.html#CorebootPayloadPkg">CorebootPayloadPkg</a>. + One of the payloads that needs legacy hardare is the EDK2 <a target="_blank" href="quark.html#corebootPayloadPkg">corebootPayloadPkg</a>. </p>
<table border="1"> diff --git a/Documentation/Intel/development.html b/Documentation/Intel/development.html index 24b2fa9..08617c9 100644 --- a/Documentation/Intel/development.html +++ b/Documentation/Intel/development.html @@ -150,12 +150,12 @@ <tr> <td>8254 Programmable Interval Timer</td> <td><a target="_blank" href="SoC/soc.html#LegacyHardware">Legacy hardware</a> support</td> - <td><a target="_blank" href="SoC/quark.html#CorebootPayloadPkg">CorebootPayloadPkg</a> gets to shell prompt</td> + <td><a target="_blank" href="SoC/quark.html#corebootPayloadPkg">corebootPayloadPkg</a> gets to shell prompt</td> </tr> <tr> <td>8259 Programmable Interrupt Controller</td> <td><a target="_blank" href="SoC/soc.html#LegacyHardware">Legacy hardware</a> support</td> - <td><a target="_blank" href="SoC/quark.html#CorebootPayloadPkg">CorebootPayloadPkg</a> gets to shell prompt</td> + <td><a target="_blank" href="SoC/quark.html#corebootPayloadPkg">corebootPayloadPkg</a> gets to shell prompt</td> </tr> <tr> <td>Cache-as-RAM</td> @@ -374,4 +374,4 @@ <hr> <p>Modified: 4 March 2016</p> </body> -</html> \ No newline at end of file +</html> diff --git a/Documentation/Intel/index.html b/Documentation/Intel/index.html index b4daa96..d5f32a4 100644 --- a/Documentation/Intel/index.html +++ b/Documentation/Intel/index.html @@ -10,7 +10,7 @@ <h2>Intel® x86 Boards</h2> <ul> <li><a target="_blank" href="Board/galileo.html">Galileo</a></li> - <li><a target="_blank" href="http://wiki.minnowboard.org/Coreboot">MinnowBoard MAX</a></li> + <li><a target="_blank" href="http://wiki.minnowboard.org/coreboot">MinnowBoard MAX</a></li> </ul>
<h2>Intel® x86 SoCs</h2> @@ -37,7 +37,7 @@ <hr> <h2>Payload Development</h2> <ul> - <li><a target="_blank" href="SoC/quark.html#CorebootPayloadPkg">CorebootPayloadPkg</a> + <li><a target="_blank" href="SoC/quark.html#corebootPayloadPkg">corebootPayloadPkg</a> <ul> <li><a target="_blank" href="https://github.com/tianocore/tianocore.github.io/wiki/EDK-II-Development-Process">EDK II Development Process</a></li> <li>EDK II <a target="_blank" href="https://github.com/tianocore/tianocore.github.io/wiki/EDK%20II%20White%20papers">White Papers</a></li> diff --git a/src/mainboard/intel/leafhill/brd_gpio.h b/src/mainboard/intel/leafhill/brd_gpio.h index 18d130b..ca99f11 100644 --- a/src/mainboard/intel/leafhill/brd_gpio.h +++ b/src/mainboard/intel/leafhill/brd_gpio.h @@ -46,4 +46,9 @@
PAD_CFG_NF(SMB_CLK, NATIVE, DEEP, NF1), PAD_CFG_NF(SMB_DATA, NATIVE, DEEP, NF1), + +#ifdef CONFIG_BOARD_INTEL_LEAFHILL + /// Added feature to enable USB power for USB devices, specifically keyboard and mouse. + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_23, 1, DEEP, DN_20K, TxLASTRxE, SAME), /// Feature: LB USB Power in LFH +#endif };
-
Jose S. Cofreros Jr. (Code Review)