Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47250 )
Change subject: soc/amd/picasso: add Raven1 GPU PCI ID ......................................................................
soc/amd/picasso: add Raven1 GPU PCI ID
Change-Id: Id4460eb596b080dec1a63a20869182170c3388af Signed-off-by: Felix Held felix-coreboot@felixheld.de --- M src/soc/amd/picasso/include/soc/cpu.h 1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/47250/1
diff --git a/src/soc/amd/picasso/include/soc/cpu.h b/src/soc/amd/picasso/include/soc/cpu.h index e79dd87..cbc3929 100644 --- a/src/soc/amd/picasso/include/soc/cpu.h +++ b/src/soc/amd/picasso/include/soc/cpu.h @@ -12,6 +12,8 @@ #define RAVEN2_A0_CPUID 0x00820f00 #define RAVEN2_A1_CPUID 0x00820f01
+#define RAVEN1_VBIOS_VID_DID 0x100215dd +#define RAVEN1_VBIOS_REV 0x81 #define PICASSO_VBIOS_VID_DID 0x100215d8 #define PICASSO_VBIOS_REV 0xc1 #define RAVEN2_VBIOS_VID_DID 0x100215dd /* VID/DID in RV2 VBIOS header */
Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47250 )
Change subject: soc/amd/picasso: add Raven1 GPU PCI ID ......................................................................
Patch Set 1: Code-Review+2
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47250 )
Change subject: soc/amd/picasso: add Raven1 GPU PCI ID ......................................................................
soc/amd/picasso: add Raven1 GPU PCI ID
Change-Id: Id4460eb596b080dec1a63a20869182170c3388af Signed-off-by: Felix Held felix-coreboot@felixheld.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/47250 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Marshall Dawson marshalldawson3rd@gmail.com --- M src/soc/amd/picasso/include/soc/cpu.h 1 file changed, 2 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Marshall Dawson: Looks good to me, approved
diff --git a/src/soc/amd/picasso/include/soc/cpu.h b/src/soc/amd/picasso/include/soc/cpu.h index e79dd87..cbc3929 100644 --- a/src/soc/amd/picasso/include/soc/cpu.h +++ b/src/soc/amd/picasso/include/soc/cpu.h @@ -12,6 +12,8 @@ #define RAVEN2_A0_CPUID 0x00820f00 #define RAVEN2_A1_CPUID 0x00820f01
+#define RAVEN1_VBIOS_VID_DID 0x100215dd +#define RAVEN1_VBIOS_REV 0x81 #define PICASSO_VBIOS_VID_DID 0x100215d8 #define PICASSO_VBIOS_REV 0xc1 #define RAVEN2_VBIOS_VID_DID 0x100215dd /* VID/DID in RV2 VBIOS header */
-
Felix Held (Code Review) -
Marshall Dawson (Code Review)