Marc Jones has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45838 )
Change subject: soc/intel/xeon_sp/acpi: Move ACPI macros to a header file ......................................................................
soc/intel/xeon_sp/acpi: Move ACPI macros to a header file
Move APCI macros to a header file to be used in multiple ASL files.
This could be moved to intel/common in the future to reduce the amount of duplicate ASL code.
Change-Id: Id2441763fe335154048c9a584a227a18e8c5391c Signed-off-by: Marc Jones marcjones@sysproconsulting.com --- M src/soc/intel/xeon_sp/acpi/pci_irqs.asl M src/soc/intel/xeon_sp/acpi/uncore_irq.asl A src/soc/intel/xeon_sp/include/soc/acpi_asl.h 3 files changed, 78 insertions(+), 67 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/45838/1
diff --git a/src/soc/intel/xeon_sp/acpi/pci_irqs.asl b/src/soc/intel/xeon_sp/acpi/pci_irqs.asl index b2a2ebf..eccb46b9 100644 --- a/src/soc/intel/xeon_sp/acpi/pci_irqs.asl +++ b/src/soc/intel/xeon_sp/acpi/pci_irqs.asl @@ -1,5 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <soc/acpi_asl.h> + /* * Refer to Intel® C620 Series Chipset Platform Controller Hub EDS section 20.11 * CONFIG_PCR_BASE_ADDRESS 0xfd000000 0x3100 @@ -42,49 +44,6 @@ Alias (PRSA, PRSG) Alias (PRSA, PRSH)
-#define MAKE_LINK_DEV(id,uid) \ - Device (LNK##id) \ - { \ - Name (_HID, EISAID ("PNP0C0F")) \ - Name (_UID, ##uid) \ - Method (_PRS, 0, NotSerialized) \ - { \ - Return (PRS##id) \ - } \ - Method (_CRS, 0, Serialized) \ - { \ - Name (RTLA, ResourceTemplate () \ - { \ - IRQ (Level, ActiveLow, Shared) {} \ - }) \ - CreateWordField (RTLA, 1, IRQ0) \ - Store (Zero, IRQ0) \ - \ - /* Set the bit from PIRQ Routing Register */ \ - ShiftLeft (1, And (^^PIR##id, ^^IREM), IRQ0) \ - Return (RTLA) \ - } \ - Method (_SRS, 1, Serialized) \ - { \ - CreateWordField (Arg0, 1, IRQ0) \ - FindSetRightBit (IRQ0, Local0) \ - Decrement (Local0) \ - Store (Local0, ^^PIR##id) \ - } \ - Method (_STA, 0, Serialized) \ - { \ - If (And (^^PIR##id, ^^IREN)) { \ - Return (0x9) \ - } Else { \ - Return (0xb) \ - } \ - } \ - Method (_DIS, 0, Serialized) \ - { \ - Or (^^PIR##id, ^^IREN, ^^PIR##id) \ - } \ - } - MAKE_LINK_DEV(A,1) MAKE_LINK_DEV(B,2) MAKE_LINK_DEV(C,3) diff --git a/src/soc/intel/xeon_sp/acpi/uncore_irq.asl b/src/soc/intel/xeon_sp/acpi/uncore_irq.asl index ae4a088..d23aa41 100644 --- a/src/soc/intel/xeon_sp/acpi/uncore_irq.asl +++ b/src/soc/intel/xeon_sp/acpi/uncore_irq.asl @@ -1,35 +1,13 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <soc/acpi_asl.h> + /* * Uncore devices PCI interrupt routing packages. * See ACPI spec 6.2.13 _PRT (PCI routing table) for details. * The mapping fields ae Address, Pin, Source, Source Index. */
-#define GEN_PCIE_LEGACY_IRQ() \ - Package () { 0x0000FFFF, 0x00, LNKA, 0x00 }, \ - Package () { 0x0001FFFF, 0x01, LNKB, 0x00 }, \ - Package () { 0x0002FFFF, 0x02, LNKC, 0x00 }, \ - Package () { 0x0003FFFF, 0x03, LNKD, 0x00 } - -#define GEN_UNCORE_LEGACY_IRQ(dev) \ - Package () { ##dev, 0x00, LNKA, 0x00 }, \ - Package () { ##dev, 0x01, LNKB, 0x00 }, \ - Package () { ##dev, 0x02, LNKC, 0x00 }, \ - Package () { ##dev, 0x03, LNKD, 0x00 } - -#define GEN_PCIE_IOAPIC_IRQ(irq1, irq2, irq3, irq4) \ - Package () { 0x0000FFFF, 0x00, 0x00, ##irq1 }, \ - Package () { 0x0001FFFF, 0x01, 0x00, ##irq2 }, \ - Package () { 0x0002FFFF, 0x02, 0x00, ##irq3 }, \ - Package () { 0x0003FFFF, 0x03, 0x00, ##irq4 } - -#define GEN_UNCORE_IOAPIC_IRQ(dev,irq1,irq2,irq3,irq4) \ - Package () { ##dev, 0x00, 0x00, ##irq1 }, \ - Package () { ##dev, 0x01, 0x00, ##irq2 }, \ - Package () { ##dev, 0x02, 0x00, ##irq3 }, \ - Package () { ##dev, 0x03, 0x00, ##irq4 } - // Socket 0, IIOStack 0 device legacy interrupt routing Name (PR00, Package () { diff --git a/src/soc/intel/xeon_sp/include/soc/acpi_asl.h b/src/soc/intel/xeon_sp/include/soc/acpi_asl.h new file mode 100644 index 0000000..e08e02b --- /dev/null +++ b/src/soc/intel/xeon_sp/include/soc/acpi_asl.h @@ -0,0 +1,74 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef _SOC_ACPI_ASL_H_ +#define _SOC_ACPI_ASL_H_ + +#define GEN_PCIE_LEGACY_IRQ() \ + Package () { 0x0000FFFF, 0x00, LNKA, 0x00 }, \ + Package () { 0x0001FFFF, 0x01, LNKB, 0x00 }, \ + Package () { 0x0002FFFF, 0x02, LNKC, 0x00 }, \ + Package () { 0x0003FFFF, 0x03, LNKD, 0x00 } + +#define GEN_UNCORE_LEGACY_IRQ(dev) \ + Package () { ##dev, 0x00, LNKA, 0x00 }, \ + Package () { ##dev, 0x01, LNKB, 0x00 }, \ + Package () { ##dev, 0x02, LNKC, 0x00 }, \ + Package () { ##dev, 0x03, LNKD, 0x00 } + +#define GEN_PCIE_IOAPIC_IRQ(irq1, irq2, irq3, irq4) \ + Package () { 0x0000FFFF, 0x00, 0x00, ##irq1 }, \ + Package () { 0x0001FFFF, 0x01, 0x00, ##irq2 }, \ + Package () { 0x0002FFFF, 0x02, 0x00, ##irq3 }, \ + Package () { 0x0003FFFF, 0x03, 0x00, ##irq4 } + +#define GEN_UNCORE_IOAPIC_IRQ(dev,irq1,irq2,irq3,irq4) \ + Package () { ##dev, 0x00, 0x00, ##irq1 }, \ + Package () { ##dev, 0x01, 0x00, ##irq2 }, \ + Package () { ##dev, 0x02, 0x00, ##irq3 }, \ + Package () { ##dev, 0x03, 0x00, ##irq4 } + + +#define MAKE_LINK_DEV(id,uid) \ + Device (LNK##id) \ + { \ + Name (_HID, EISAID ("PNP0C0F")) \ + Name (_UID, ##uid) \ + Method (_PRS, 0, NotSerialized) \ + { \ + Return (PRS##id) \ + } \ + Method (_CRS, 0, Serialized) \ + { \ + Name (RTLA, ResourceTemplate () \ + { \ + IRQ (Level, ActiveLow, Shared) {} \ + }) \ + CreateWordField (RTLA, 1, IRQ0) \ + Store (Zero, IRQ0) \ + \ + /* Set the bit from PIRQ Routing Register */ \ + ShiftLeft (1, And (^^PIR##id, ^^IREM), IRQ0) \ + Return (RTLA) \ + } \ + Method (_SRS, 1, Serialized) \ + { \ + CreateWordField (Arg0, 1, IRQ0) \ + FindSetRightBit (IRQ0, Local0) \ + Decrement (Local0) \ + Store (Local0, ^^PIR##id) \ + } \ + Method (_STA, 0, Serialized) \ + { \ + If (And (^^PIR##id, ^^IREN)) { \ + Return (0x9) \ + } Else { \ + Return (0xb) \ + } \ + } \ + Method (_DIS, 0, Serialized) \ + { \ + Or (^^PIR##id, ^^IREN, ^^PIR##id) \ + } \ + } + +#endif
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45838 )
Change subject: soc/intel/xeon_sp/acpi: Move ACPI macros to a header file ......................................................................
Patch Set 1:
(59 comments)
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... File src/soc/intel/xeon_sp/include/soc/acpi_asl.h:
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 6: #define GEN_PCIE_LEGACY_IRQ() \ Macros with complex values should be enclosed in parentheses
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 7: Package () { 0x0000FFFF, 0x00, LNKA, 0x00 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 8: Package () { 0x0001FFFF, 0x01, LNKB, 0x00 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 9: Package () { 0x0002FFFF, 0x02, LNKC, 0x00 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 10: Package () { 0x0003FFFF, 0x03, LNKD, 0x00 } space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 12: #define GEN_UNCORE_LEGACY_IRQ(dev) \ Macros with complex values should be enclosed in parentheses
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 13: Package () { ##dev, 0x00, LNKA, 0x00 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 14: Package () { ##dev, 0x01, LNKB, 0x00 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 15: Package () { ##dev, 0x02, LNKC, 0x00 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 16: Package () { ##dev, 0x03, LNKD, 0x00 } space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 18: #define GEN_PCIE_IOAPIC_IRQ(irq1, irq2, irq3, irq4) \ Macros with complex values should be enclosed in parentheses
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 19: Package () { 0x0000FFFF, 0x00, 0x00, ##irq1 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 20: Package () { 0x0001FFFF, 0x01, 0x00, ##irq2 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 21: Package () { 0x0002FFFF, 0x02, 0x00, ##irq3 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 22: Package () { 0x0003FFFF, 0x03, 0x00, ##irq4 } space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 24: #define GEN_UNCORE_IOAPIC_IRQ(dev,irq1,irq2,irq3,irq4) \ space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 24: #define GEN_UNCORE_IOAPIC_IRQ(dev,irq1,irq2,irq3,irq4) \ space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 24: #define GEN_UNCORE_IOAPIC_IRQ(dev,irq1,irq2,irq3,irq4) \ space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 24: #define GEN_UNCORE_IOAPIC_IRQ(dev,irq1,irq2,irq3,irq4) \ space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 24: #define GEN_UNCORE_IOAPIC_IRQ(dev,irq1,irq2,irq3,irq4) \ Macros with complex values should be enclosed in parentheses
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 25: Package () { ##dev, 0x00, 0x00, ##irq1 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 26: Package () { ##dev, 0x01, 0x00, ##irq2 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 27: Package () { ##dev, 0x02, 0x00, ##irq3 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 28: Package () { ##dev, 0x03, 0x00, ##irq4 } space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 31: #define MAKE_LINK_DEV(id,uid) \ space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 31: #define MAKE_LINK_DEV(id,uid) \ Macros with complex values should be enclosed in parentheses
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 32: Device (LNK##id) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 34: Name (_HID, EISAID ("PNP0C0F")) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 34: Name (_HID, EISAID ("PNP0C0F")) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 35: Name (_UID, ##uid) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 36: Method (_PRS, 0, NotSerialized) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 38: Return (PRS##id) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 40: Method (_CRS, 0, Serialized) \ please, no space before tabs
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 40: Method (_CRS, 0, Serialized) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 42: Name (RTLA, ResourceTemplate () \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 42: Name (RTLA, ResourceTemplate () \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 44: IRQ (Level, ActiveLow, Shared) {} \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 46: CreateWordField (RTLA, 1, IRQ0) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 47: Store (Zero, IRQ0) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 50: ShiftLeft (1, And (^^PIR##id, ^^IREM), IRQ0) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 50: ShiftLeft (1, And (^^PIR##id, ^^IREM), IRQ0) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 50: ShiftLeft (1, And (^^PIR##id, ^^IREM), IRQ0) \ need consistent spacing around '^' (ctx:WxO)
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 51: Return (RTLA) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 53: Method (_SRS, 1, Serialized) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 55: CreateWordField (Arg0, 1, IRQ0) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 56: FindSetRightBit (IRQ0, Local0) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 57: Decrement (Local0) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 58: Store (Local0, ^^PIR##id) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 58: Store (Local0, ^^PIR##id) \ need consistent spacing around '^' (ctx:WxO)
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 60: Method (_STA, 0, Serialized) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 62: If (And (^^PIR##id, ^^IREN)) { \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 62: If (And (^^PIR##id, ^^IREN)) { \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 62: If (And (^^PIR##id, ^^IREN)) { \ need consistent spacing around '^' (ctx:WxO)
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 63: Return (0x9) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 65: Return (0xb) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 68: Method (_DIS, 0, Serialized) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 70: Or (^^PIR##id, ^^IREN, ^^PIR##id) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 70: Or (^^PIR##id, ^^IREN, ^^PIR##id) \ need consistent spacing around '^' (ctx:WxO)
https://review.coreboot.org/c/coreboot/+/45838/1/src/soc/intel/xeon_sp/inclu... PS1, Line 70: Or (^^PIR##id, ^^IREN, ^^PIR##id) \ need consistent spacing around '^' (ctx:WxO)
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45838 )
Change subject: soc/intel/xeon_sp/acpi: Move ACPI macros to a header file ......................................................................
Patch Set 2:
(59 comments)
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... File src/soc/intel/xeon_sp/include/soc/acpi_asl.h:
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 6: #define GEN_PCIE_LEGACY_IRQ() \ Macros with complex values should be enclosed in parentheses
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 7: Package () { 0x0000FFFF, 0x00, LNKA, 0x00 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 8: Package () { 0x0001FFFF, 0x01, LNKB, 0x00 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 9: Package () { 0x0002FFFF, 0x02, LNKC, 0x00 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 10: Package () { 0x0003FFFF, 0x03, LNKD, 0x00 } space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 12: #define GEN_UNCORE_LEGACY_IRQ(dev) \ Macros with complex values should be enclosed in parentheses
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 13: Package () { ##dev, 0x00, LNKA, 0x00 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 14: Package () { ##dev, 0x01, LNKB, 0x00 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 15: Package () { ##dev, 0x02, LNKC, 0x00 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 16: Package () { ##dev, 0x03, LNKD, 0x00 } space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 18: #define GEN_PCIE_IOAPIC_IRQ(irq1, irq2, irq3, irq4) \ Macros with complex values should be enclosed in parentheses
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 19: Package () { 0x0000FFFF, 0x00, 0x00, ##irq1 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 20: Package () { 0x0001FFFF, 0x01, 0x00, ##irq2 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 21: Package () { 0x0002FFFF, 0x02, 0x00, ##irq3 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 22: Package () { 0x0003FFFF, 0x03, 0x00, ##irq4 } space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 24: #define GEN_UNCORE_IOAPIC_IRQ(dev,irq1,irq2,irq3,irq4) \ space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 24: #define GEN_UNCORE_IOAPIC_IRQ(dev,irq1,irq2,irq3,irq4) \ space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 24: #define GEN_UNCORE_IOAPIC_IRQ(dev,irq1,irq2,irq3,irq4) \ space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 24: #define GEN_UNCORE_IOAPIC_IRQ(dev,irq1,irq2,irq3,irq4) \ space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 24: #define GEN_UNCORE_IOAPIC_IRQ(dev,irq1,irq2,irq3,irq4) \ Macros with complex values should be enclosed in parentheses
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 25: Package () { ##dev, 0x00, 0x00, ##irq1 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 26: Package () { ##dev, 0x01, 0x00, ##irq2 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 27: Package () { ##dev, 0x02, 0x00, ##irq3 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 28: Package () { ##dev, 0x03, 0x00, ##irq4 } space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 31: #define MAKE_LINK_DEV(id,uid) \ space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 31: #define MAKE_LINK_DEV(id,uid) \ Macros with complex values should be enclosed in parentheses
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 32: Device (LNK##id) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 34: Name (_HID, EISAID ("PNP0C0F")) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 34: Name (_HID, EISAID ("PNP0C0F")) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 35: Name (_UID, ##uid) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 36: Method (_PRS, 0, NotSerialized) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 38: Return (PRS##id) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 40: Method (_CRS, 0, Serialized) \ please, no space before tabs
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 40: Method (_CRS, 0, Serialized) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 42: Name (RTLA, ResourceTemplate () \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 42: Name (RTLA, ResourceTemplate () \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 44: IRQ (Level, ActiveLow, Shared) {} \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 46: CreateWordField (RTLA, 1, IRQ0) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 47: Store (Zero, IRQ0) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 50: ShiftLeft (1, And (^^PIR##id, ^^IREM), IRQ0) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 50: ShiftLeft (1, And (^^PIR##id, ^^IREM), IRQ0) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 50: ShiftLeft (1, And (^^PIR##id, ^^IREM), IRQ0) \ need consistent spacing around '^' (ctx:WxO)
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 51: Return (RTLA) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 53: Method (_SRS, 1, Serialized) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 55: CreateWordField (Arg0, 1, IRQ0) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 56: FindSetRightBit (IRQ0, Local0) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 57: Decrement (Local0) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 58: Store (Local0, ^^PIR##id) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 58: Store (Local0, ^^PIR##id) \ need consistent spacing around '^' (ctx:WxO)
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 60: Method (_STA, 0, Serialized) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 62: If (And (^^PIR##id, ^^IREN)) { \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 62: If (And (^^PIR##id, ^^IREN)) { \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 62: If (And (^^PIR##id, ^^IREN)) { \ need consistent spacing around '^' (ctx:WxO)
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 63: Return (0x9) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 65: Return (0xb) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 68: Method (_DIS, 0, Serialized) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 70: Or (^^PIR##id, ^^IREN, ^^PIR##id) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 70: Or (^^PIR##id, ^^IREN, ^^PIR##id) \ need consistent spacing around '^' (ctx:WxO)
https://review.coreboot.org/c/coreboot/+/45838/2/src/soc/intel/xeon_sp/inclu... PS2, Line 70: Or (^^PIR##id, ^^IREN, ^^PIR##id) \ need consistent spacing around '^' (ctx:WxO)
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45838 )
Change subject: soc/intel/xeon_sp/acpi: Move ACPI macros to a header file ......................................................................
Patch Set 3:
(59 comments)
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... File src/soc/intel/xeon_sp/include/soc/acpi_asl.h:
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 6: #define GEN_PCIE_LEGACY_IRQ() \ Macros with complex values should be enclosed in parentheses
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 7: Package () { 0x0000FFFF, 0x00, LNKA, 0x00 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 8: Package () { 0x0001FFFF, 0x01, LNKB, 0x00 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 9: Package () { 0x0002FFFF, 0x02, LNKC, 0x00 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 10: Package () { 0x0003FFFF, 0x03, LNKD, 0x00 } space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 12: #define GEN_UNCORE_LEGACY_IRQ(dev) \ Macros with complex values should be enclosed in parentheses
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 13: Package () { ##dev, 0x00, LNKA, 0x00 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 14: Package () { ##dev, 0x01, LNKB, 0x00 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 15: Package () { ##dev, 0x02, LNKC, 0x00 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 16: Package () { ##dev, 0x03, LNKD, 0x00 } space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 18: #define GEN_PCIE_IOAPIC_IRQ(irq1, irq2, irq3, irq4) \ Macros with complex values should be enclosed in parentheses
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 19: Package () { 0x0000FFFF, 0x00, 0x00, ##irq1 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 20: Package () { 0x0001FFFF, 0x01, 0x00, ##irq2 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 21: Package () { 0x0002FFFF, 0x02, 0x00, ##irq3 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 22: Package () { 0x0003FFFF, 0x03, 0x00, ##irq4 } space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 24: #define GEN_UNCORE_IOAPIC_IRQ(dev,irq1,irq2,irq3,irq4) \ space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 24: #define GEN_UNCORE_IOAPIC_IRQ(dev,irq1,irq2,irq3,irq4) \ space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 24: #define GEN_UNCORE_IOAPIC_IRQ(dev,irq1,irq2,irq3,irq4) \ space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 24: #define GEN_UNCORE_IOAPIC_IRQ(dev,irq1,irq2,irq3,irq4) \ space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 24: #define GEN_UNCORE_IOAPIC_IRQ(dev,irq1,irq2,irq3,irq4) \ Macros with complex values should be enclosed in parentheses
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 25: Package () { ##dev, 0x00, 0x00, ##irq1 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 26: Package () { ##dev, 0x01, 0x00, ##irq2 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 27: Package () { ##dev, 0x02, 0x00, ##irq3 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 28: Package () { ##dev, 0x03, 0x00, ##irq4 } space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 31: #define MAKE_LINK_DEV(id,uid) \ space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 31: #define MAKE_LINK_DEV(id,uid) \ Macros with complex values should be enclosed in parentheses
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 32: Device (LNK##id) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 34: Name (_HID, EISAID ("PNP0C0F")) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 34: Name (_HID, EISAID ("PNP0C0F")) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 35: Name (_UID, ##uid) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 36: Method (_PRS, 0, NotSerialized) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 38: Return (PRS##id) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 40: Method (_CRS, 0, Serialized) \ please, no space before tabs
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 40: Method (_CRS, 0, Serialized) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 42: Name (RTLA, ResourceTemplate () \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 42: Name (RTLA, ResourceTemplate () \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 44: IRQ (Level, ActiveLow, Shared) {} \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 46: CreateWordField (RTLA, 1, IRQ0) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 47: Store (Zero, IRQ0) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 50: ShiftLeft (1, And (^^PIR##id, ^^IREM), IRQ0) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 50: ShiftLeft (1, And (^^PIR##id, ^^IREM), IRQ0) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 50: ShiftLeft (1, And (^^PIR##id, ^^IREM), IRQ0) \ need consistent spacing around '^' (ctx:WxO)
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 51: Return (RTLA) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 53: Method (_SRS, 1, Serialized) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 55: CreateWordField (Arg0, 1, IRQ0) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 56: FindSetRightBit (IRQ0, Local0) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 57: Decrement (Local0) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 58: Store (Local0, ^^PIR##id) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 58: Store (Local0, ^^PIR##id) \ need consistent spacing around '^' (ctx:WxO)
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 60: Method (_STA, 0, Serialized) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 62: If (And (^^PIR##id, ^^IREN)) { \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 62: If (And (^^PIR##id, ^^IREN)) { \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 62: If (And (^^PIR##id, ^^IREN)) { \ need consistent spacing around '^' (ctx:WxO)
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 63: Return (0x9) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 65: Return (0xb) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 68: Method (_DIS, 0, Serialized) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 70: Or (^^PIR##id, ^^IREN, ^^PIR##id) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 70: Or (^^PIR##id, ^^IREN, ^^PIR##id) \ need consistent spacing around '^' (ctx:WxO)
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 70: Or (^^PIR##id, ^^IREN, ^^PIR##id) \ need consistent spacing around '^' (ctx:WxO)
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45838 )
Change subject: soc/intel/xeon_sp/acpi: Move ACPI macros to a header file ......................................................................
Patch Set 3: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/45838/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45838/3//COMMIT_MSG@9 PS3, Line 9: APCI ACPI
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45838 )
Change subject: soc/intel/xeon_sp/acpi: Move ACPI macros to a header file ......................................................................
Patch Set 3:
(2 comments)
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... File src/soc/intel/xeon_sp/include/soc/acpi_asl.h:
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 47: Store (Z old syntax. please use ASL 2.0 syntax.
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 50: ShiftLeft (1, And (^^PIR##id, ^^IREM), IRQ0) old syntax
Marc Jones has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45838 )
Change subject: soc/intel/xeon_sp/acpi: Move ACPI macros to a header file ......................................................................
Patch Set 3:
(3 comments)
https://review.coreboot.org/c/coreboot/+/45838/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45838/3//COMMIT_MSG@9 PS3, Line 9: APCI
ACPI
Ack
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... File src/soc/intel/xeon_sp/include/soc/acpi_asl.h:
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 47: Store (Z
old syntax. […]
nack, this patch moves code and is not a syntax code update. We don't need to arbitrarily re-write ASL code.
https://review.coreboot.org/c/coreboot/+/45838/3/src/soc/intel/xeon_sp/inclu... PS3, Line 50: ShiftLeft (1, And (^^PIR##id, ^^IREM), IRQ0)
old syntax
nack, this patch moves code and is not a syntax code update. We don't need to arbitrarily re-write ASL code.
Marc Jones has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45838 )
Change subject: soc/intel/xeon_sp/acpi: Move ACPI macros to a header file ......................................................................
Patch Set 3:
Also note that buildbot is unhappy with the MACROs (which it doesn't check in .asl file), but the text replace magic doesn't work right if I try to change these. Maybe someone can work the MACRO magic in a future commit.
No code is changing in this commit.
Hello build bot (Jenkins), Angel Pons, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45838
to look at the new patch set (#4).
Change subject: soc/intel/xeon_sp/acpi: Move ACPI macros to a header file ......................................................................
soc/intel/xeon_sp/acpi: Move ACPI macros to a header file
Move ACPI macros to a header file to be used in multiple ASL files.
This could be moved to intel/common in the future to reduce the amount of duplicate ASL code.
Tested by checking build/dsdt.asl doesn't change.
Change-Id: Id2441763fe335154048c9a584a227a18e8c5391c Signed-off-by: Marc Jones marcjones@sysproconsulting.com --- M src/soc/intel/xeon_sp/acpi/pci_irqs.asl M src/soc/intel/xeon_sp/acpi/uncore_irq.asl A src/soc/intel/xeon_sp/include/soc/acpi_asl.h 3 files changed, 78 insertions(+), 67 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/45838/4
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45838 )
Change subject: soc/intel/xeon_sp/acpi: Move ACPI macros to a header file ......................................................................
Patch Set 4:
(59 comments)
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... File src/soc/intel/xeon_sp/include/soc/acpi_asl.h:
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 6: #define GEN_PCIE_LEGACY_IRQ() \ Macros with complex values should be enclosed in parentheses
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 7: Package () { 0x0000FFFF, 0x00, LNKA, 0x00 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 8: Package () { 0x0001FFFF, 0x01, LNKB, 0x00 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 9: Package () { 0x0002FFFF, 0x02, LNKC, 0x00 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 10: Package () { 0x0003FFFF, 0x03, LNKD, 0x00 } space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 12: #define GEN_UNCORE_LEGACY_IRQ(dev) \ Macros with complex values should be enclosed in parentheses
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 13: Package () { ##dev, 0x00, LNKA, 0x00 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 14: Package () { ##dev, 0x01, LNKB, 0x00 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 15: Package () { ##dev, 0x02, LNKC, 0x00 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 16: Package () { ##dev, 0x03, LNKD, 0x00 } space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 18: #define GEN_PCIE_IOAPIC_IRQ(irq1, irq2, irq3, irq4) \ Macros with complex values should be enclosed in parentheses
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 19: Package () { 0x0000FFFF, 0x00, 0x00, ##irq1 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 20: Package () { 0x0001FFFF, 0x01, 0x00, ##irq2 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 21: Package () { 0x0002FFFF, 0x02, 0x00, ##irq3 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 22: Package () { 0x0003FFFF, 0x03, 0x00, ##irq4 } space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 24: #define GEN_UNCORE_IOAPIC_IRQ(dev,irq1,irq2,irq3,irq4) \ space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 24: #define GEN_UNCORE_IOAPIC_IRQ(dev,irq1,irq2,irq3,irq4) \ space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 24: #define GEN_UNCORE_IOAPIC_IRQ(dev,irq1,irq2,irq3,irq4) \ space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 24: #define GEN_UNCORE_IOAPIC_IRQ(dev,irq1,irq2,irq3,irq4) \ space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 24: #define GEN_UNCORE_IOAPIC_IRQ(dev,irq1,irq2,irq3,irq4) \ Macros with complex values should be enclosed in parentheses
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 25: Package () { ##dev, 0x00, 0x00, ##irq1 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 26: Package () { ##dev, 0x01, 0x00, ##irq2 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 27: Package () { ##dev, 0x02, 0x00, ##irq3 }, \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 28: Package () { ##dev, 0x03, 0x00, ##irq4 } space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 31: #define MAKE_LINK_DEV(id,uid) \ space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 31: #define MAKE_LINK_DEV(id,uid) \ Macros with complex values should be enclosed in parentheses
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 32: Device (LNK##id) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 34: Name (_HID, EISAID ("PNP0C0F")) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 34: Name (_HID, EISAID ("PNP0C0F")) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 35: Name (_UID, ##uid) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 36: Method (_PRS, 0, NotSerialized) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 38: Return (PRS##id) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 40: Method (_CRS, 0, Serialized) \ please, no space before tabs
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 40: Method (_CRS, 0, Serialized) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 42: Name (RTLA, ResourceTemplate () \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 42: Name (RTLA, ResourceTemplate () \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 44: IRQ (Level, ActiveLow, Shared) {} \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 46: CreateWordField (RTLA, 1, IRQ0) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 47: Store (Zero, IRQ0) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 50: ShiftLeft (1, And (^^PIR##id, ^^IREM), IRQ0) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 50: ShiftLeft (1, And (^^PIR##id, ^^IREM), IRQ0) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 50: ShiftLeft (1, And (^^PIR##id, ^^IREM), IRQ0) \ need consistent spacing around '^' (ctx:WxO)
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 51: Return (RTLA) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 53: Method (_SRS, 1, Serialized) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 55: CreateWordField (Arg0, 1, IRQ0) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 56: FindSetRightBit (IRQ0, Local0) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 57: Decrement (Local0) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 58: Store (Local0, ^^PIR##id) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 58: Store (Local0, ^^PIR##id) \ need consistent spacing around '^' (ctx:WxO)
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 60: Method (_STA, 0, Serialized) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 62: If (And (^^PIR##id, ^^IREN)) { \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 62: If (And (^^PIR##id, ^^IREN)) { \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 62: If (And (^^PIR##id, ^^IREN)) { \ need consistent spacing around '^' (ctx:WxO)
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 63: Return (0x9) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 65: Return (0xb) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 68: Method (_DIS, 0, Serialized) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 70: Or (^^PIR##id, ^^IREN, ^^PIR##id) \ space prohibited between function name and open parenthesis '('
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 70: Or (^^PIR##id, ^^IREN, ^^PIR##id) \ need consistent spacing around '^' (ctx:WxO)
https://review.coreboot.org/c/coreboot/+/45838/4/src/soc/intel/xeon_sp/inclu... PS4, Line 70: Or (^^PIR##id, ^^IREN, ^^PIR##id) \ need consistent spacing around '^' (ctx:WxO)
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45838 )
Change subject: soc/intel/xeon_sp/acpi: Move ACPI macros to a header file ......................................................................
Patch Set 4: Code-Review+2
Marc Jones has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45838 )
Change subject: soc/intel/xeon_sp/acpi: Move ACPI macros to a header file ......................................................................
soc/intel/xeon_sp/acpi: Move ACPI macros to a header file
Move ACPI macros to a header file to be used in multiple ASL files.
This could be moved to intel/common in the future to reduce the amount of duplicate ASL code.
Tested by checking build/dsdt.asl doesn't change.
Change-Id: Id2441763fe335154048c9a584a227a18e8c5391c Signed-off-by: Marc Jones marcjones@sysproconsulting.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/45838 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/xeon_sp/acpi/pci_irqs.asl M src/soc/intel/xeon_sp/acpi/uncore_irq.asl A src/soc/intel/xeon_sp/include/soc/acpi_asl.h 3 files changed, 78 insertions(+), 67 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/soc/intel/xeon_sp/acpi/pci_irqs.asl b/src/soc/intel/xeon_sp/acpi/pci_irqs.asl index b2a2ebf..eccb46b9 100644 --- a/src/soc/intel/xeon_sp/acpi/pci_irqs.asl +++ b/src/soc/intel/xeon_sp/acpi/pci_irqs.asl @@ -1,5 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <soc/acpi_asl.h> + /* * Refer to Intel® C620 Series Chipset Platform Controller Hub EDS section 20.11 * CONFIG_PCR_BASE_ADDRESS 0xfd000000 0x3100 @@ -42,49 +44,6 @@ Alias (PRSA, PRSG) Alias (PRSA, PRSH)
-#define MAKE_LINK_DEV(id,uid) \ - Device (LNK##id) \ - { \ - Name (_HID, EISAID ("PNP0C0F")) \ - Name (_UID, ##uid) \ - Method (_PRS, 0, NotSerialized) \ - { \ - Return (PRS##id) \ - } \ - Method (_CRS, 0, Serialized) \ - { \ - Name (RTLA, ResourceTemplate () \ - { \ - IRQ (Level, ActiveLow, Shared) {} \ - }) \ - CreateWordField (RTLA, 1, IRQ0) \ - Store (Zero, IRQ0) \ - \ - /* Set the bit from PIRQ Routing Register */ \ - ShiftLeft (1, And (^^PIR##id, ^^IREM), IRQ0) \ - Return (RTLA) \ - } \ - Method (_SRS, 1, Serialized) \ - { \ - CreateWordField (Arg0, 1, IRQ0) \ - FindSetRightBit (IRQ0, Local0) \ - Decrement (Local0) \ - Store (Local0, ^^PIR##id) \ - } \ - Method (_STA, 0, Serialized) \ - { \ - If (And (^^PIR##id, ^^IREN)) { \ - Return (0x9) \ - } Else { \ - Return (0xb) \ - } \ - } \ - Method (_DIS, 0, Serialized) \ - { \ - Or (^^PIR##id, ^^IREN, ^^PIR##id) \ - } \ - } - MAKE_LINK_DEV(A,1) MAKE_LINK_DEV(B,2) MAKE_LINK_DEV(C,3) diff --git a/src/soc/intel/xeon_sp/acpi/uncore_irq.asl b/src/soc/intel/xeon_sp/acpi/uncore_irq.asl index ae4a088..d23aa41 100644 --- a/src/soc/intel/xeon_sp/acpi/uncore_irq.asl +++ b/src/soc/intel/xeon_sp/acpi/uncore_irq.asl @@ -1,35 +1,13 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <soc/acpi_asl.h> + /* * Uncore devices PCI interrupt routing packages. * See ACPI spec 6.2.13 _PRT (PCI routing table) for details. * The mapping fields ae Address, Pin, Source, Source Index. */
-#define GEN_PCIE_LEGACY_IRQ() \ - Package () { 0x0000FFFF, 0x00, LNKA, 0x00 }, \ - Package () { 0x0001FFFF, 0x01, LNKB, 0x00 }, \ - Package () { 0x0002FFFF, 0x02, LNKC, 0x00 }, \ - Package () { 0x0003FFFF, 0x03, LNKD, 0x00 } - -#define GEN_UNCORE_LEGACY_IRQ(dev) \ - Package () { ##dev, 0x00, LNKA, 0x00 }, \ - Package () { ##dev, 0x01, LNKB, 0x00 }, \ - Package () { ##dev, 0x02, LNKC, 0x00 }, \ - Package () { ##dev, 0x03, LNKD, 0x00 } - -#define GEN_PCIE_IOAPIC_IRQ(irq1, irq2, irq3, irq4) \ - Package () { 0x0000FFFF, 0x00, 0x00, ##irq1 }, \ - Package () { 0x0001FFFF, 0x01, 0x00, ##irq2 }, \ - Package () { 0x0002FFFF, 0x02, 0x00, ##irq3 }, \ - Package () { 0x0003FFFF, 0x03, 0x00, ##irq4 } - -#define GEN_UNCORE_IOAPIC_IRQ(dev,irq1,irq2,irq3,irq4) \ - Package () { ##dev, 0x00, 0x00, ##irq1 }, \ - Package () { ##dev, 0x01, 0x00, ##irq2 }, \ - Package () { ##dev, 0x02, 0x00, ##irq3 }, \ - Package () { ##dev, 0x03, 0x00, ##irq4 } - // Socket 0, IIOStack 0 device legacy interrupt routing Name (PR00, Package () { diff --git a/src/soc/intel/xeon_sp/include/soc/acpi_asl.h b/src/soc/intel/xeon_sp/include/soc/acpi_asl.h new file mode 100644 index 0000000..e08e02b --- /dev/null +++ b/src/soc/intel/xeon_sp/include/soc/acpi_asl.h @@ -0,0 +1,74 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef _SOC_ACPI_ASL_H_ +#define _SOC_ACPI_ASL_H_ + +#define GEN_PCIE_LEGACY_IRQ() \ + Package () { 0x0000FFFF, 0x00, LNKA, 0x00 }, \ + Package () { 0x0001FFFF, 0x01, LNKB, 0x00 }, \ + Package () { 0x0002FFFF, 0x02, LNKC, 0x00 }, \ + Package () { 0x0003FFFF, 0x03, LNKD, 0x00 } + +#define GEN_UNCORE_LEGACY_IRQ(dev) \ + Package () { ##dev, 0x00, LNKA, 0x00 }, \ + Package () { ##dev, 0x01, LNKB, 0x00 }, \ + Package () { ##dev, 0x02, LNKC, 0x00 }, \ + Package () { ##dev, 0x03, LNKD, 0x00 } + +#define GEN_PCIE_IOAPIC_IRQ(irq1, irq2, irq3, irq4) \ + Package () { 0x0000FFFF, 0x00, 0x00, ##irq1 }, \ + Package () { 0x0001FFFF, 0x01, 0x00, ##irq2 }, \ + Package () { 0x0002FFFF, 0x02, 0x00, ##irq3 }, \ + Package () { 0x0003FFFF, 0x03, 0x00, ##irq4 } + +#define GEN_UNCORE_IOAPIC_IRQ(dev,irq1,irq2,irq3,irq4) \ + Package () { ##dev, 0x00, 0x00, ##irq1 }, \ + Package () { ##dev, 0x01, 0x00, ##irq2 }, \ + Package () { ##dev, 0x02, 0x00, ##irq3 }, \ + Package () { ##dev, 0x03, 0x00, ##irq4 } + + +#define MAKE_LINK_DEV(id,uid) \ + Device (LNK##id) \ + { \ + Name (_HID, EISAID ("PNP0C0F")) \ + Name (_UID, ##uid) \ + Method (_PRS, 0, NotSerialized) \ + { \ + Return (PRS##id) \ + } \ + Method (_CRS, 0, Serialized) \ + { \ + Name (RTLA, ResourceTemplate () \ + { \ + IRQ (Level, ActiveLow, Shared) {} \ + }) \ + CreateWordField (RTLA, 1, IRQ0) \ + Store (Zero, IRQ0) \ + \ + /* Set the bit from PIRQ Routing Register */ \ + ShiftLeft (1, And (^^PIR##id, ^^IREM), IRQ0) \ + Return (RTLA) \ + } \ + Method (_SRS, 1, Serialized) \ + { \ + CreateWordField (Arg0, 1, IRQ0) \ + FindSetRightBit (IRQ0, Local0) \ + Decrement (Local0) \ + Store (Local0, ^^PIR##id) \ + } \ + Method (_STA, 0, Serialized) \ + { \ + If (And (^^PIR##id, ^^IREN)) { \ + Return (0x9) \ + } Else { \ + Return (0xb) \ + } \ + } \ + Method (_DIS, 0, Serialized) \ + { \ + Or (^^PIR##id, ^^IREN, ^^PIR##id) \ + } \ + } + +#endif
-
Angel Pons (Code Review) -
build bot (Jenkins) (Code Review)
-
HAOUAS Elyes (Code Review)
-
Marc Jones (Code Review)