[M] Change in coreboot[master]: soc/intel/common: Add Intel Trace Hub driver

[Pratikkumar V Prajapati (Code Review)]

Attention is currently required from: Nico Huber, Tarun Tuli, Subrata Banik, Kapil Porwal, Sridhar Siricilla.

Pratikkumar V Prajapati has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72722 )

Change subject: soc/intel/common: Add Intel Trace Hub driver
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Patch Set 4:

(1 comment)

Patchset:

PS3:
> That's a good question. IMO, Not all devices may have 4+ GiB RAM. […]

Nico, Sorry for the long pause in replying.

Is the platform has more than 4GB of memory it can be used to store larger amount of traces from Intel Trace HUB (TH) IP. If the memory is smaller than 4GB, we can still user internal buffer of TH to store traces. In either cases we can still use streaming to the host machine to get traces. This driver adds support for devices that have larger memory. If the platform has memory larger than 4GB then FSP will allocate region for traces in DRAM (per UPD params), if platform has lesser memory then we need to use internal buffer or use streaming mode.