Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63793 )
Change subject: ec/google/chromeec: Add retimer handle to Type C conn ......................................................................
ec/google/chromeec: Add retimer handle to Type C conn
Some platforms have retimers which can be configured via the EC. Add a handle to these retimer devices to the Type C connector device, using devicetree references.
BUG=b:208883648 TEST=Verify disassembled SSDT on brya. BRANCH=None
Signed-off-by: Prashant Malani pmalani@chromium.org Change-Id: Ic0480b08c6d6a7562cca57192e49b8ea2a33b51e Reviewed-on: https://review.coreboot.org/c/coreboot/+/63793 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/acpi/acpigen_usb.c M src/ec/google/chromeec/chip.h M src/ec/google/chromeec/ec_acpi.c M src/include/acpi/acpigen_usb.h 4 files changed, 6 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/acpi/acpigen_usb.c b/src/acpi/acpigen_usb.c index e32dfc4..e71e6da 100644 --- a/src/acpi/acpigen_usb.c +++ b/src/acpi/acpigen_usb.c @@ -106,6 +106,7 @@ add_device_ref(dsd, "orientation-switch", config->orientation_switch); add_device_ref(dsd, "usb-role-switch", config->usb_role_switch); add_device_ref(dsd, "mode-switch", config->mode_switch); + add_device_ref(dsd, "retimer-switch", config->retimer_switch); }
void acpigen_write_typec_connector(const struct typec_connector_class_config *config, diff --git a/src/ec/google/chromeec/chip.h b/src/ec/google/chromeec/chip.h index 3915cf9..bb03e57 100644 --- a/src/ec/google/chromeec/chip.h +++ b/src/ec/google/chromeec/chip.h @@ -11,6 +11,7 @@ struct ec_google_chromeec_config { /* Pointer to PMC Mux connector for each Type-C port */ DEVTREE_CONST struct device *mux_conn[MAX_TYPEC_PORTS]; + DEVTREE_CONST struct device *retimer_conn[MAX_TYPEC_PORTS]; };
#endif /* EC_GOOGLE_CHROMEEC_CHIP_H */ diff --git a/src/ec/google/chromeec/ec_acpi.c b/src/ec/google/chromeec/ec_acpi.c index 7f94626..69b1078 100644 --- a/src/ec/google/chromeec/ec_acpi.c +++ b/src/ec/google/chromeec/ec_acpi.c @@ -195,6 +195,7 @@ .orientation_switch = config->mux_conn[i], .usb_role_switch = config->mux_conn[i], .mode_switch = config->mux_conn[i], + .retimer_switch = config->retimer_conn[i], .pld = &pld, };
diff --git a/src/include/acpi/acpigen_usb.h b/src/include/acpi/acpigen_usb.h index 8042874..b065129 100644 --- a/src/include/acpi/acpigen_usb.h +++ b/src/include/acpi/acpigen_usb.h @@ -41,6 +41,8 @@ * host or device, for the USB port * @mode_switch: Reference to the ACPI device that controls routing of data lines to * various endpoints (xHCI, DP, etc.) on the SoC. + * @retimer_switch: Reference to the ACPI device that controls the configuration + * of the retimer in the Type C signal chain. * @pld: Reference to PLD information. */ struct typec_connector_class_config { @@ -53,6 +55,7 @@ const struct device *orientation_switch; const struct device *usb_role_switch; const struct device *mode_switch; + const struct device *retimer_switch; const struct acpi_pld *pld; };
3 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one.