Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46113 )
Change subject: soc/amd/picasso: Print values from PSP transfer buffer ......................................................................
soc/amd/picasso: Print values from PSP transfer buffer
The PSP will now pass us data on the PSP boot mode and the production silicon level. Print these values out to save in the log.
These definitions are in a vendorcode include directory that was previously only included in verstage. Add the include directory to all stages.
BUG=b:170237834 TEST=Build & Boot - See values printed. BRANCH=Zork
Signed-off-by: Martin Roth martinroth@chromium.org Change-Id: Iee87413d1473786cf0e148a8088d27f8d24a47a1 --- M src/soc/amd/picasso/Makefile.inc M src/soc/amd/picasso/bootblock/bootblock.c M src/soc/amd/picasso/psp_verstage/Makefile.inc 3 files changed, 24 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/46113/1
diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index 1e9ba4a..b8f35b8 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -98,6 +98,7 @@ CPPFLAGS_common += -I$(src)/soc/amd/picasso/include CPPFLAGS_common += -I$(src)/soc/amd/picasso/acpi CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/picasso +CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/picasso/include
MAINBOARD_BLOBS_DIR:=$(top)/3rdparty/blobs/mainboard/$(MAINBOARDDIR)
diff --git a/src/soc/amd/picasso/bootblock/bootblock.c b/src/soc/amd/picasso/bootblock/bootblock.c index 1626c55..b0f76f6 100644 --- a/src/soc/amd/picasso/bootblock/bootblock.c +++ b/src/soc/amd/picasso/bootblock/bootblock.c @@ -3,6 +3,7 @@ #include <stdint.h> #include <symbols.h> #include <amdblocks/reset.h> +#include <bl_uapp/bl_syscall_public.h> #include <bootblock_common.h> #include <console/console.h> #include <cpu/x86/cache.h> @@ -136,7 +137,28 @@ cmos_write(CMOS_RECOVERY_MAGIC_VAL, CMOS_RECOVERY_BYTE); warm_reset(); } + +static void show_psp_transfer_info(void) +{ + struct transfer_info_struct *info = (struct transfer_info_struct *) + (void *)(uintptr_t)_transfer_buffer; + + if (info->magic_val == TRANSFER_MAGIC_VAL) { + if ((info->psp_info & PSP_INFO_VALID) == 0) { + printk(BIOS_INFO,"No PSP info found in transfer buffer.\n"); + return; + } + + printk(BIOS_INFO,"PSP boot mode: %s\n", + info->psp_info & PSP_INFO_PRODUCTION_MODE ? + "Production" : "Development"); + printk(BIOS_INFO,"Silicon level: %s\n", + info->psp_info & PSP_INFO_PRODUCTION_SILICON ? + "Production" : "Pre-Production"); + } +} #else +static void show_psp_transfer_info(void) {} static void verify_workbuf(void) {} #endif
@@ -161,6 +183,7 @@
if (CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK)) { verify_workbuf(); + show_psp_transfer_info(); }
fch_early_init(); diff --git a/src/soc/amd/picasso/psp_verstage/Makefile.inc b/src/soc/amd/picasso/psp_verstage/Makefile.inc index 4f1642b..36e8cbe 100644 --- a/src/soc/amd/picasso/psp_verstage/Makefile.inc +++ b/src/soc/amd/picasso/psp_verstage/Makefile.inc @@ -1,7 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only
verstage-generic-ccopts += -I$(src)/soc/amd/picasso/psp_verstage/include -verstage-generic-ccopts += -I$(src)/vendorcode/amd/fsp/picasso/include verstage-generic-ccopts += -D__USER_SPACE__ CPPFLAGS_common += -I$(VBOOT_SOURCE)/firmware/2lib/include/
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46113 )
Change subject: soc/amd/picasso: Print values from PSP transfer buffer ......................................................................
Patch Set 1:
(3 comments)
https://review.coreboot.org/c/coreboot/+/46113/1/src/soc/amd/picasso/bootblo... File src/soc/amd/picasso/bootblock/bootblock.c:
https://review.coreboot.org/c/coreboot/+/46113/1/src/soc/amd/picasso/bootblo... PS1, Line 148: printk(BIOS_INFO,"No PSP info found in transfer buffer.\n"); space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/46113/1/src/soc/amd/picasso/bootblo... PS1, Line 152: printk(BIOS_INFO,"PSP boot mode: %s\n", space required after that ',' (ctx:VxV)
https://review.coreboot.org/c/coreboot/+/46113/1/src/soc/amd/picasso/bootblo... PS1, Line 155: printk(BIOS_INFO,"Silicon level: %s\n", space required after that ',' (ctx:VxV)
Hello build bot (Jenkins), Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46113
to look at the new patch set (#2).
Change subject: soc/amd/picasso: Print values from PSP transfer buffer ......................................................................
soc/amd/picasso: Print values from PSP transfer buffer
The PSP will now pass us data on the PSP boot mode and the production silicon level. Print these values out to save in the log.
These definitions are in a vendorcode include directory that was previously only included in verstage. Add the include directory to all stages.
BUG=b:170237834 TEST=Build & Boot - See values printed. BRANCH=Zork
Signed-off-by: Martin Roth martinroth@chromium.org Change-Id: Iee87413d1473786cf0e148a8088d27f8d24a47a1 --- M src/soc/amd/picasso/Makefile.inc M src/soc/amd/picasso/bootblock/bootblock.c M src/soc/amd/picasso/psp_verstage/Makefile.inc 3 files changed, 24 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/46113/2
Hello build bot (Jenkins), Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46113
to look at the new patch set (#3).
Change subject: soc/amd/picasso: Print values from PSP transfer buffer ......................................................................
soc/amd/picasso: Print values from PSP transfer buffer
The PSP will now pass us data on the PSP boot mode and the production silicon level. Print these values out to save in the log.
These definitions are in a vendorcode include directory that was previously only included in verstage. Add the include directory to all stages.
BUG=b:170237834 TEST=Build & Boot - See values printed. BRANCH=Zork
Signed-off-by: Martin Roth martinroth@chromium.org Change-Id: Iee87413d1473786cf0e148a8088d27f8d24a47a1 --- M src/soc/amd/picasso/Makefile.inc M src/soc/amd/picasso/bootblock/bootblock.c M src/soc/amd/picasso/bootblock/vboot_bootblock.c M src/soc/amd/picasso/include/soc/psp_transfer.h M src/soc/amd/picasso/psp_verstage/Makefile.inc 5 files changed, 25 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/46113/3
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46113 )
Change subject: soc/amd/picasso: Print values from PSP transfer buffer ......................................................................
Patch Set 3: Code-Review+2
Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46113 )
Change subject: soc/amd/picasso: Print values from PSP transfer buffer ......................................................................
Patch Set 3: Code-Review+2
Hello build bot (Jenkins), Patrick Georgi, Marshall Dawson, Aaron Durbin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46113
to look at the new patch set (#4).
Change subject: soc/amd/picasso: Print values from PSP transfer buffer ......................................................................
soc/amd/picasso: Print values from PSP transfer buffer
The PSP will now pass us data on the PSP boot mode and the production silicon level. Print these values out to save in the log.
These definitions are in a vendorcode include directory that was previously only included in verstage. Add the include directory to all stages.
BUG=b:170237834 TEST=Build & Boot - See values printed. BRANCH=Zork
Signed-off-by: Martin Roth martinroth@chromium.org Change-Id: Iee87413d1473786cf0e148a8088d27f8d24a47a1 --- M src/soc/amd/picasso/Makefile.inc M src/soc/amd/picasso/bootblock/bootblock.c M src/soc/amd/picasso/bootblock/vboot_bootblock.c M src/soc/amd/picasso/include/soc/psp_transfer.h 4 files changed, 25 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/46113/4
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46113 )
Change subject: soc/amd/picasso: Print values from PSP transfer buffer ......................................................................
Patch Set 4: Code-Review+2
Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46113 )
Change subject: soc/amd/picasso: Print values from PSP transfer buffer ......................................................................
Patch Set 4: Code-Review+2
Sam McNally has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46113 )
Change subject: soc/amd/picasso: Print values from PSP transfer buffer ......................................................................
Patch Set 4: Code-Review+2
Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46113 )
Change subject: soc/amd/picasso: Print values from PSP transfer buffer ......................................................................
soc/amd/picasso: Print values from PSP transfer buffer
The PSP will now pass us data on the PSP boot mode and the production silicon level. Print these values out to save in the log.
These definitions are in a vendorcode include directory that was previously only included in verstage. Add the include directory to all stages.
BUG=b:170237834 TEST=Build & Boot - See values printed. BRANCH=Zork
Signed-off-by: Martin Roth martinroth@chromium.org Change-Id: Iee87413d1473786cf0e148a8088d27f8d24a47a1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/46113 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Aaron Durbin adurbin@chromium.org Reviewed-by: Edward O'Callaghan quasisec@chromium.org Reviewed-by: Sam McNally sammc@google.com --- M src/soc/amd/picasso/Makefile.inc M src/soc/amd/picasso/bootblock/bootblock.c M src/soc/amd/picasso/bootblock/vboot_bootblock.c M src/soc/amd/picasso/include/soc/psp_transfer.h 4 files changed, 25 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Aaron Durbin: Looks good to me, approved Edward O'Callaghan: Looks good to me, approved Sam McNally: Looks good to me, approved
diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index 1ed1529..9757160 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -100,6 +100,7 @@ CPPFLAGS_common += -I$(src)/soc/amd/picasso/include CPPFLAGS_common += -I$(src)/soc/amd/picasso/acpi CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/picasso +CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/picasso/include
MAINBOARD_BLOBS_DIR:=$(top)/3rdparty/blobs/mainboard/$(MAINBOARDDIR)
diff --git a/src/soc/amd/picasso/bootblock/bootblock.c b/src/soc/amd/picasso/bootblock/bootblock.c index dfd5364..c715324 100644 --- a/src/soc/amd/picasso/bootblock/bootblock.c +++ b/src/soc/amd/picasso/bootblock/bootblock.c @@ -129,6 +129,7 @@
if (CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK)) { verify_psp_transfer_buf(); + show_psp_transfer_info(); }
fch_early_init(); diff --git a/src/soc/amd/picasso/bootblock/vboot_bootblock.c b/src/soc/amd/picasso/bootblock/vboot_bootblock.c index 4c3ae4a..3fbc4ef 100644 --- a/src/soc/amd/picasso/bootblock/vboot_bootblock.c +++ b/src/soc/amd/picasso/bootblock/vboot_bootblock.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/reset.h> +#include <bl_uapp/bl_syscall_public.h> #include <console/console.h> #include <pc80/mc146818rtc.h> #include <security/vboot/vbnv.h> @@ -30,3 +31,23 @@ cmos_write(CMOS_RECOVERY_MAGIC_VAL, CMOS_RECOVERY_BYTE); warm_reset(); } + +void show_psp_transfer_info(void) +{ + struct transfer_info_struct *info = (struct transfer_info_struct *) + (void *)(uintptr_t)_transfer_buffer; + + if (info->magic_val == TRANSFER_MAGIC_VAL) { + if ((info->psp_info & PSP_INFO_VALID) == 0) { + printk(BIOS_INFO, "No PSP info found in transfer buffer.\n"); + return; + } + + printk(BIOS_INFO, "PSP boot mode: %s\n", + info->psp_info & PSP_INFO_PRODUCTION_MODE ? + "Production" : "Development"); + printk(BIOS_INFO, "Silicon level: %s\n", + info->psp_info & PSP_INFO_PRODUCTION_SILICON ? + "Production" : "Pre-Production"); + } +} diff --git a/src/soc/amd/picasso/include/soc/psp_transfer.h b/src/soc/amd/picasso/include/soc/psp_transfer.h index fdd7bd1..afc4d7d 100644 --- a/src/soc/amd/picasso/include/soc/psp_transfer.h +++ b/src/soc/amd/picasso/include/soc/psp_transfer.h @@ -44,6 +44,8 @@
/* Make sure the PSP transferred information over to x86 side. */ void verify_psp_transfer_buf(void); +/* Display the transfer block's PSP_info data */ +void show_psp_transfer_info(void);
#endif
-
Aaron Durbin (Code Review) -
build bot (Jenkins) (Code Review)
-
Edward O'Callaghan (Code Review)
-
Marshall Dawson (Code Review)
-
Martin Roth (Code Review)
-
Sam McNally (Code Review)