Hello Matt DeVillier, Angel Pons, Patrick Rudolph,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/40729
to review the following change.
Change subject: soc/intel/gma: Implement fsp_soc_get_igd_bar() in common code ......................................................................
soc/intel/gma: Implement fsp_soc_get_igd_bar() in common code
Change-Id: Iaa5981088eeb5c36f765d6332ae47a38a6a4c875 Signed-off-by: Nico Huber nico.h@gmx.de --- M src/soc/intel/apollolake/Makefile.inc D src/soc/intel/apollolake/graphics.c M src/soc/intel/cannonlake/Makefile.inc D src/soc/intel/cannonlake/graphics.c M src/soc/intel/common/block/graphics/graphics.c M src/soc/intel/icelake/Makefile.inc D src/soc/intel/icelake/graphics.c M src/soc/intel/jasperlake/Makefile.inc D src/soc/intel/jasperlake/graphics.c M src/soc/intel/skylake/graphics.c M src/soc/intel/tigerlake/Makefile.inc D src/soc/intel/tigerlake/graphics.c 12 files changed, 7 insertions(+), 134 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/40729/1
diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index a20a554..517c8ca 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -54,7 +54,6 @@ ramstage-y += chip.c ramstage-y += cse.c ramstage-y += elog.c -ramstage-y += graphics.c ramstage-y += gspi.c ramstage-y += heci.c ramstage-y += i2c.c diff --git a/src/soc/intel/apollolake/graphics.c b/src/soc/intel/apollolake/graphics.c deleted file mode 100644 index 8deb548..0000000 --- a/src/soc/intel/apollolake/graphics.c +++ /dev/null @@ -1,23 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <fsp/util.h> -#include <intelblocks/graphics.h> -#include <types.h> - -uintptr_t fsp_soc_get_igd_bar(void) -{ - return graphics_get_memory_base(); -} diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index c744e99..b1523be 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -36,7 +36,6 @@ ramstage-y += elog.c ramstage-y += finalize.c ramstage-y += fsp_params.c -ramstage-y += graphics.c ramstage-y += gspi.c ramstage-y += i2c.c ramstage-y += lockdown.c diff --git a/src/soc/intel/cannonlake/graphics.c b/src/soc/intel/cannonlake/graphics.c deleted file mode 100644 index cdc4a6a..0000000 --- a/src/soc/intel/cannonlake/graphics.c +++ /dev/null @@ -1,26 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <arch/acpi.h> -#include <fsp/util.h> -#include <device/device.h> -#include <drivers/intel/gma/i915_reg.h> -#include <intelblocks/graphics.h> -#include <types.h> - -uintptr_t fsp_soc_get_igd_bar(void) -{ - return graphics_get_memory_base(); -} diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c index 206810f..7a0cebe 100644 --- a/src/soc/intel/common/block/graphics/graphics.c +++ b/src/soc/intel/common/block/graphics/graphics.c @@ -23,8 +23,10 @@ #include <drivers/intel/gma/i915.h> #include <drivers/intel/gma/libgfxinit.h> #include <drivers/intel/gma/opregion.h> +#include <fsp/util.h> #include <intelblocks/graphics.h> #include <soc/pci_devs.h> +#include <types.h>
/* SoC Overrides */ __weak void graphics_soc_init(struct device *dev) @@ -166,6 +168,11 @@ graphics_gtt_write(reg, val); }
+uintptr_t fsp_soc_get_igd_bar(void) +{ + return graphics_get_memory_base(); +} + static const struct device_operations graphics_ops = { .read_resources = pci_dev_read_resources, .set_resources = pci_dev_set_resources, diff --git a/src/soc/intel/icelake/Makefile.inc b/src/soc/intel/icelake/Makefile.inc index f30816e..05f4846 100644 --- a/src/soc/intel/icelake/Makefile.inc +++ b/src/soc/intel/icelake/Makefile.inc @@ -35,7 +35,6 @@ ramstage-y += finalize.c ramstage-y += fsp_params.c ramstage-y += gpio.c -ramstage-y += graphics.c ramstage-y += lockdown.c ramstage-y += p2sb.c ramstage-y += pmc.c diff --git a/src/soc/intel/icelake/graphics.c b/src/soc/intel/icelake/graphics.c deleted file mode 100644 index 8deb548..0000000 --- a/src/soc/intel/icelake/graphics.c +++ /dev/null @@ -1,23 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <fsp/util.h> -#include <intelblocks/graphics.h> -#include <types.h> - -uintptr_t fsp_soc_get_igd_bar(void) -{ - return graphics_get_memory_base(); -} diff --git a/src/soc/intel/jasperlake/Makefile.inc b/src/soc/intel/jasperlake/Makefile.inc index 4a65adc..ba63433 100644 --- a/src/soc/intel/jasperlake/Makefile.inc +++ b/src/soc/intel/jasperlake/Makefile.inc @@ -36,7 +36,6 @@ ramstage-y += finalize.c ramstage-y += fsp_params.c ramstage-y += gpio.c -ramstage-y += graphics.c ramstage-y += lockdown.c ramstage-y += p2sb.c ramstage-y += pmc.c diff --git a/src/soc/intel/jasperlake/graphics.c b/src/soc/intel/jasperlake/graphics.c deleted file mode 100644 index 8deb548..0000000 --- a/src/soc/intel/jasperlake/graphics.c +++ /dev/null @@ -1,23 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <fsp/util.h> -#include <intelblocks/graphics.h> -#include <types.h> - -uintptr_t fsp_soc_get_igd_bar(void) -{ - return graphics_get_memory_base(); -} diff --git a/src/soc/intel/skylake/graphics.c b/src/soc/intel/skylake/graphics.c index 8285ad9..a33b7ac 100644 --- a/src/soc/intel/skylake/graphics.c +++ b/src/soc/intel/skylake/graphics.c @@ -11,11 +11,6 @@ #include <soc/ramstage.h> #include <types.h>
-uintptr_t fsp_soc_get_igd_bar(void) -{ - return graphics_get_memory_base(); -} - void graphics_soc_init(struct device *dev) { struct soc_intel_skylake_config *conf = config_of(dev); diff --git a/src/soc/intel/tigerlake/Makefile.inc b/src/soc/intel/tigerlake/Makefile.inc index f62bfaf..626cb06 100644 --- a/src/soc/intel/tigerlake/Makefile.inc +++ b/src/soc/intel/tigerlake/Makefile.inc @@ -36,7 +36,6 @@ ramstage-y += finalize.c ramstage-y += fsp_params.c ramstage-y += gpio.c -ramstage-y += graphics.c ramstage-y += lockdown.c ramstage-y += p2sb.c ramstage-y += pmc.c diff --git a/src/soc/intel/tigerlake/graphics.c b/src/soc/intel/tigerlake/graphics.c deleted file mode 100644 index 90d3a02..0000000 --- a/src/soc/intel/tigerlake/graphics.c +++ /dev/null @@ -1,29 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* - * This file is created based on Intel Tiger Lake Processor SA Datasheet - * Document number: 571131 - * Chapter number: 4 - */ - -#include <fsp/util.h> -#include <intelblocks/graphics.h> -#include <types.h> - -uintptr_t fsp_soc_get_igd_bar(void) -{ - return graphics_get_memory_base(); -}
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Matt DeVillier, Angel Pons, Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/40729
to look at the new patch set (#2).
Change subject: soc/intel/gma: Implement fsp_soc_get_igd_bar() in common code ......................................................................
soc/intel/gma: Implement fsp_soc_get_igd_bar() in common code
Change-Id: Iaa5981088eeb5c36f765d6332ae47a38a6a4c875 Signed-off-by: Nico Huber nico.h@gmx.de --- M src/soc/intel/apollolake/Makefile.inc D src/soc/intel/apollolake/graphics.c M src/soc/intel/cannonlake/Makefile.inc D src/soc/intel/cannonlake/graphics.c M src/soc/intel/common/block/graphics/graphics.c M src/soc/intel/icelake/Makefile.inc D src/soc/intel/icelake/graphics.c M src/soc/intel/jasperlake/Makefile.inc D src/soc/intel/jasperlake/graphics.c M src/soc/intel/skylake/graphics.c M src/soc/intel/tigerlake/Makefile.inc D src/soc/intel/tigerlake/graphics.c 12 files changed, 7 insertions(+), 134 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/40729/2
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Matt DeVillier, Angel Pons, Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/40729
to look at the new patch set (#3).
Change subject: soc/intel/gma: Implement fsp_soc_get_igd_bar() in common code ......................................................................
soc/intel/gma: Implement fsp_soc_get_igd_bar() in common code
Change-Id: Iaa5981088eeb5c36f765d6332ae47a38a6a4c875 Signed-off-by: Nico Huber nico.h@gmx.de --- M src/soc/intel/apollolake/Makefile.inc D src/soc/intel/apollolake/graphics.c M src/soc/intel/cannonlake/Makefile.inc D src/soc/intel/cannonlake/graphics.c M src/soc/intel/common/block/graphics/graphics.c M src/soc/intel/icelake/Makefile.inc D src/soc/intel/icelake/graphics.c M src/soc/intel/jasperlake/Makefile.inc D src/soc/intel/jasperlake/graphics.c M src/soc/intel/skylake/graphics.c M src/soc/intel/tigerlake/Makefile.inc D src/soc/intel/tigerlake/graphics.c 12 files changed, 11 insertions(+), 134 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/40729/3
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Matt DeVillier, Angel Pons, Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/40729
to look at the new patch set (#4).
Change subject: soc/intel/gma: Implement fsp_soc_get_igd_bar() in common code ......................................................................
soc/intel/gma: Implement fsp_soc_get_igd_bar() in common code
`fsp/util.h` draws incompatible UDK headers in. Hence, we have to declare it locally again.
Change-Id: Iaa5981088eeb5c36f765d6332ae47a38a6a4c875 Signed-off-by: Nico Huber nico.h@gmx.de --- M src/soc/intel/apollolake/Makefile.inc D src/soc/intel/apollolake/graphics.c M src/soc/intel/cannonlake/Makefile.inc D src/soc/intel/cannonlake/graphics.c M src/soc/intel/common/block/graphics/graphics.c M src/soc/intel/icelake/Makefile.inc D src/soc/intel/icelake/graphics.c M src/soc/intel/jasperlake/Makefile.inc D src/soc/intel/jasperlake/graphics.c M src/soc/intel/skylake/graphics.c M src/soc/intel/tigerlake/Makefile.inc D src/soc/intel/tigerlake/graphics.c 12 files changed, 11 insertions(+), 134 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/40729/4
Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40729 )
Change subject: soc/intel/gma: Implement fsp_soc_get_igd_bar() in common code ......................................................................
Patch Set 4:
does it make sense to delete graphics.c for platforms which don't yet implement intel_igd_get_controller_info() but likely will, or which don't yet have soc-specific panel init yet?
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40729 )
Change subject: soc/intel/gma: Implement fsp_soc_get_igd_bar() in common code ......................................................................
Patch Set 4:
Patch Set 4:
does it make sense to delete graphics.c for platforms which don't yet implement intel_igd_get_controller_info() but likely will, or which don't yet have soc-specific panel init yet?
Nothing is soc specific. Intel copy-paste hardware designs just like software. I assume the SKL panel init also works up to CML. The one for APL might work everywhere else.
I have plans to move intel_igd_get_controller_info() into `chip.c`. Need a break, though ;)
Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40729 )
Change subject: soc/intel/gma: Implement fsp_soc_get_igd_bar() in common code ......................................................................
Patch Set 4: Code-Review+1
tested ok on google/chell (SKL)
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Matt DeVillier, Angel Pons, Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/40729
to look at the new patch set (#5).
Change subject: soc/intel/gma: Implement fsp_soc_get_igd_bar() in common code ......................................................................
soc/intel/gma: Implement fsp_soc_get_igd_bar() in common code
`fsp/util.h` draws incompatible UDK headers in. Hence, we have to declare it locally again.
Change-Id: Iaa5981088eeb5c36f765d6332ae47a38a6a4c875 Signed-off-by: Nico Huber nico.h@gmx.de --- M src/soc/intel/apollolake/Makefile.inc D src/soc/intel/apollolake/graphics.c M src/soc/intel/cannonlake/Makefile.inc D src/soc/intel/cannonlake/graphics.c M src/soc/intel/common/block/graphics/graphics.c M src/soc/intel/icelake/Makefile.inc D src/soc/intel/icelake/graphics.c M src/soc/intel/jasperlake/Makefile.inc D src/soc/intel/jasperlake/graphics.c M src/soc/intel/skylake/graphics.c M src/soc/intel/tigerlake/Makefile.inc D src/soc/intel/tigerlake/graphics.c 12 files changed, 11 insertions(+), 69 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/40729/5
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40729 )
Change subject: soc/intel/gma: Implement fsp_soc_get_igd_bar() in common code ......................................................................
Patch Set 8: Code-Review+2
Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/40729 )
Change subject: soc/intel/gma: Implement fsp_soc_get_igd_bar() in common code ......................................................................
soc/intel/gma: Implement fsp_soc_get_igd_bar() in common code
`fsp/util.h` draws incompatible UDK headers in. Hence, we have to declare it locally again.
Change-Id: Iaa5981088eeb5c36f765d6332ae47a38a6a4c875 Signed-off-by: Nico Huber nico.h@gmx.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/40729 Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/apollolake/Makefile.inc D src/soc/intel/apollolake/graphics.c M src/soc/intel/cannonlake/Makefile.inc D src/soc/intel/cannonlake/graphics.c M src/soc/intel/common/block/graphics/graphics.c M src/soc/intel/icelake/Makefile.inc D src/soc/intel/icelake/graphics.c M src/soc/intel/jasperlake/Makefile.inc D src/soc/intel/jasperlake/graphics.c M src/soc/intel/skylake/graphics.c M src/soc/intel/tigerlake/Makefile.inc D src/soc/intel/tigerlake/graphics.c 12 files changed, 11 insertions(+), 69 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index a20a554..517c8ca 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -54,7 +54,6 @@ ramstage-y += chip.c ramstage-y += cse.c ramstage-y += elog.c -ramstage-y += graphics.c ramstage-y += gspi.c ramstage-y += heci.c ramstage-y += i2c.c diff --git a/src/soc/intel/apollolake/graphics.c b/src/soc/intel/apollolake/graphics.c deleted file mode 100644 index c8d282d..0000000 --- a/src/soc/intel/apollolake/graphics.c +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -#include <fsp/util.h> -#include <intelblocks/graphics.h> -#include <types.h> - -uintptr_t fsp_soc_get_igd_bar(void) -{ - return graphics_get_memory_base(); -} diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index e060581..96f1f97 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -36,7 +36,6 @@ ramstage-y += elog.c ramstage-y += finalize.c ramstage-y += fsp_params.c -ramstage-y += graphics.c ramstage-y += gspi.c ramstage-y += i2c.c ramstage-y += lockdown.c diff --git a/src/soc/intel/cannonlake/graphics.c b/src/soc/intel/cannonlake/graphics.c deleted file mode 100644 index 5fbe0d5..0000000 --- a/src/soc/intel/cannonlake/graphics.c +++ /dev/null @@ -1,13 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -#include <acpi/acpi.h> -#include <fsp/util.h> -#include <device/device.h> -#include <drivers/intel/gma/i915_reg.h> -#include <intelblocks/graphics.h> -#include <types.h> - -uintptr_t fsp_soc_get_igd_bar(void) -{ - return graphics_get_memory_base(); -} diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c index e2c9060..f232ee5 100644 --- a/src/soc/intel/common/block/graphics/graphics.c +++ b/src/soc/intel/common/block/graphics/graphics.c @@ -12,6 +12,7 @@ #include <drivers/intel/gma/opregion.h> #include <intelblocks/graphics.h> #include <soc/pci_devs.h> +#include <types.h>
/* SoC Overrides */ __weak void graphics_soc_init(struct device *dev) @@ -154,6 +155,16 @@ graphics_gtt_write(reg, val); }
+/* + * fsp_soc_get_igd_bar() is declared in <fsp/util.h>, + * but that draws incompatible UDK headers in. + */ +uintptr_t fsp_soc_get_igd_bar(void); +uintptr_t fsp_soc_get_igd_bar(void) +{ + return graphics_get_memory_base(); +} + static const struct device_operations graphics_ops = { .read_resources = pci_dev_read_resources, .set_resources = pci_dev_set_resources, diff --git a/src/soc/intel/icelake/Makefile.inc b/src/soc/intel/icelake/Makefile.inc index f30816e..05f4846 100644 --- a/src/soc/intel/icelake/Makefile.inc +++ b/src/soc/intel/icelake/Makefile.inc @@ -35,7 +35,6 @@ ramstage-y += finalize.c ramstage-y += fsp_params.c ramstage-y += gpio.c -ramstage-y += graphics.c ramstage-y += lockdown.c ramstage-y += p2sb.c ramstage-y += pmc.c diff --git a/src/soc/intel/icelake/graphics.c b/src/soc/intel/icelake/graphics.c deleted file mode 100644 index c8d282d..0000000 --- a/src/soc/intel/icelake/graphics.c +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -#include <fsp/util.h> -#include <intelblocks/graphics.h> -#include <types.h> - -uintptr_t fsp_soc_get_igd_bar(void) -{ - return graphics_get_memory_base(); -} diff --git a/src/soc/intel/jasperlake/Makefile.inc b/src/soc/intel/jasperlake/Makefile.inc index c5ad4d2..1cba218 100644 --- a/src/soc/intel/jasperlake/Makefile.inc +++ b/src/soc/intel/jasperlake/Makefile.inc @@ -36,7 +36,6 @@ ramstage-y += finalize.c ramstage-y += fsp_params.c ramstage-y += gpio.c -ramstage-y += graphics.c ramstage-y += lockdown.c ramstage-y += p2sb.c ramstage-y += pmc.c diff --git a/src/soc/intel/jasperlake/graphics.c b/src/soc/intel/jasperlake/graphics.c deleted file mode 100644 index c8d282d..0000000 --- a/src/soc/intel/jasperlake/graphics.c +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -#include <fsp/util.h> -#include <intelblocks/graphics.h> -#include <types.h> - -uintptr_t fsp_soc_get_igd_bar(void) -{ - return graphics_get_memory_base(); -} diff --git a/src/soc/intel/skylake/graphics.c b/src/soc/intel/skylake/graphics.c index 27cb874..4ecf67a 100644 --- a/src/soc/intel/skylake/graphics.c +++ b/src/soc/intel/skylake/graphics.c @@ -10,11 +10,6 @@ #include <soc/ramstage.h> #include <types.h>
-uintptr_t fsp_soc_get_igd_bar(void) -{ - return graphics_get_memory_base(); -} - void graphics_soc_init(struct device *dev) { struct soc_intel_skylake_config *conf = config_of(dev); diff --git a/src/soc/intel/tigerlake/Makefile.inc b/src/soc/intel/tigerlake/Makefile.inc index 9ff767c..c4f71c7 100644 --- a/src/soc/intel/tigerlake/Makefile.inc +++ b/src/soc/intel/tigerlake/Makefile.inc @@ -36,7 +36,6 @@ ramstage-y += finalize.c ramstage-y += fsp_params.c ramstage-y += gpio.c -ramstage-y += graphics.c ramstage-y += lockdown.c ramstage-y += p2sb.c ramstage-y += pmc.c diff --git a/src/soc/intel/tigerlake/graphics.c b/src/soc/intel/tigerlake/graphics.c deleted file mode 100644 index 11aea72..0000000 --- a/src/soc/intel/tigerlake/graphics.c +++ /dev/null @@ -1,16 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -/* - * This file is created based on Intel Tiger Lake Processor SA Datasheet - * Document number: 571131 - * Chapter number: 4 - */ - -#include <fsp/util.h> -#include <intelblocks/graphics.h> -#include <types.h> - -uintptr_t fsp_soc_get_igd_bar(void) -{ - return graphics_get_memory_base(); -}
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40729 )
Change subject: soc/intel/gma: Implement fsp_soc_get_igd_bar() in common code ......................................................................
Patch Set 9:
Automatic boot test returned (PASS/FAIL/TOTAL): 4/0/4 Emulation targets: "QEMU x86 q35/ich9" using payload TianoCore : SUCCESS : https://lava.9esec.io/r/4262 "QEMU x86 q35/ich9" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/4261 "QEMU x86 i440fx/piix4" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/4260 "QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/4259
Please note: This test is under development and might not be accurate at all!