EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48340 )
Change subject: soc/intel/alderlake: Revise PCIE port config ......................................................................
Patch Set 23:
(4 comments)
https://review.coreboot.org/c/coreboot/+/48340/23/src/soc/intel/alderlake/ch... File src/soc/intel/alderlake/chip.h:
https://review.coreboot.org/c/coreboot/+/48340/23/src/soc/intel/alderlake/ch... PS23, Line 26: pcie_rp_flags
A one-line comment for each of these flags would be very helpful.
I left straight ones;)
https://review.coreboot.org/c/coreboot/+/48340/23/src/soc/intel/alderlake/ch... PS23, Line 32: PCIE_RP_ALWAYS_ON_CLK
nit: For consistency I think it would be better to name these - […]
Done
https://review.coreboot.org/c/coreboot/+/48340/23/src/soc/intel/alderlake/fs... File src/soc/intel/alderlake/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/48340/23/src/soc/intel/alderlake/fs... PS23, Line 266: pcie_is_flag_enabled
nit: If you add one additional tab before pcie_is_flag_enabled(), it would make it easier to figure […]
Done
https://review.coreboot.org/c/coreboot/+/48340/23/src/soc/intel/alderlake/ro... File src/soc/intel/alderlake/romstage/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/48340/23/src/soc/intel/alderlake/ro... PS23, Line 150:
nit: extra blank line not required
Done