Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31132 )
Change subject: mainboard/intel/cannonlake_rvp: Enable SaGv config ......................................................................
mainboard/intel/cannonlake_rvp: Enable SaGv config
This patch enables SaGv on Intel CNL-Y and CNL-U RVP board
Change-Id: I8a4b8a2a365caed304935bf0d66db9a92d10c23f Signed-off-by: Ronak Kanabar ronak.kanabar@intel.com Reviewed-on: https://review.coreboot.org/c/31132 Reviewed-by: Furquan Shaikh furquan@google.com Reviewed-by: Pratikkumar V Prajapati pratikkumar.v.prajapati@intel.com Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb M src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb 2 files changed, 2 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Pratikkumar V Prajapati: Looks good to me, approved Angel Pons: Looks good to me, approved
diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb index 9604210..e5f867c 100644 --- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb +++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb @@ -5,7 +5,7 @@ end
# FSP configuration - register "SaGv" = "SaGv_FixedHigh" + register "SaGv" = "SaGv_Enabled" register "ScsEmmcHs400Enabled" = "1"
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)" diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb index e2ebaba..a6d329b 100644 --- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb +++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb @@ -5,7 +5,7 @@ end
# FSP configuration - register "SaGv" = "SaGv_FixedHigh" + register "SaGv" = "SaGv_Enabled" register "ScsEmmcHs400Enabled" = "1"
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)"