Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44696 )
Change subject: mb/intel/dq45ek: Add new mainboard ......................................................................
Patch Set 2: Code-Review+1
(2 comments)
Patch Set 2:
(3 comments)
I had this change marked WIP, so I could finish the IRQ routing and look at the ACPI tables and maybe C-states. But apparently I can't respond to comments unless I remove the WIP flag.
Only the PCI slots have fixed IRQ routing. You can optimize the routing of the other DEV/FN's (the ACPI code is generated automatically) via RCBA DxxIR.
https://review.coreboot.org/c/coreboot/+/44696/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44696/1//COMMIT_MSG@17 PS1, Line 17: fan control
Both fans are affected, as both are driven by the PCH. The SuperIO has no fan control.
I observed the same on my Intel DG43GT.
https://review.coreboot.org/c/coreboot/+/44696/2/src/mainboard/intel/dq45ek/... File src/mainboard/intel/dq45ek/early_init.c:
https://review.coreboot.org/c/coreboot/+/44696/2/src/mainboard/intel/dq45ek/... PS2, Line 5: #include <southbridge/intel/i82801jx/i82801jx.h> I think you can drop this?