Christian Walter has uploaded a new patch set (#2) to the change originally created by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/44260 )
Change subject: soc/intel/tigerlake: Add IRQs for LPSS uart ......................................................................
soc/intel/tigerlake: Add IRQs for LPSS uart
Values are taken from pci_irqs.asl. The common code will make use of those defines to generate ACPI SSDT code for LPSS uarts operating in "ACPI mode".
Change-Id: I5ef93493965834cda30d70918e65de3129e547b7 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/soc/intel/tigerlake/include/soc/irq.h 1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/44260/2