[coreboot-gerrit] [S] Change in coreboot[master]: soc/intel/meteorlake: Use index 0 instead of 0x10 for P2SB

[Subrata Banik (Code Review)]

Attention is currently required from: Tarun Tuli, Kapil Porwal, Ivy Jian, Arthur Heymans, Eric Lai.

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69041 )

Change subject: soc/intel/meteorlake: Use index 0 instead of 0x10 for P2SB
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Patch Set 1:

(1 comment)

Patchset:

PS1:
> It really is PCI BAR0, the device just gets hidden, so using index 0x10 is appropriate.

in that case https://review.coreboot.org/c/coreboot/+/69041/1/src/soc/intel/meteorlake/p2... is also wrong and pmc.c file resource allocator is wrong too https://github.com/coreboot/coreboot/blob/master/src/soc/intel/alderlake/pmc...

Fundamentally you would like to reserve those resources/ranges and doesn’t really matter what index you are giving while reserving (take a look into systemagent.c file where we have given index incrementally) as it's *not* a PCI write into the said *index*, so, it doesn't break anything.