Attention is currently required from: Tarun Tuli, Kapil Porwal, Ivy Jian, Arthur Heymans, Eric Lai.

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1 comment:

• Patchset:

  • Patch Set #1:

    It really is PCI BAR0, the device just gets hidden, so using index 0x10 is appropriate.

    in that case https://review.coreboot.org/c/coreboot/+/69041/1/src/soc/intel/meteorlake/p2sb.c#38 is also wrong and pmc.c file resource allocator is wrong too https://github.com/coreboot/coreboot/blob/master/src/soc/intel/alderlake/pmc.c#L83

    Fundamentally you would like to reserve those resources/ranges and doesn’t really matter what index you are giving while reserving (take a look into systemagent.c file where we have given index incrementally) as it's *not* a PCI write into the said *index*, so, it doesn't break anything.

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