Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38777 )
Change subject: soc/intel/tigerlake: Add PMC mux control
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Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38777/5/src/soc/intel/tigerlake/acp...
File src/soc/intel/tigerlake/acpi/pmc.asl:
https://review.coreboot.org/c/coreboot/+/38777/5/src/soc/intel/tigerlake/acp...
PS5, Line 29: 0xFE000000
PCH_PWRM_BASE_ADDRESS is the PMC MBAR MMIO base address, which is programmed through pci pch segment […]
If we have a macro we should use it. We shouldn't open code the same literal in two different places. That just leads to inconsistency if anything changes in the future.
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