[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Configure L1Substates for PCH Root ports

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39412 )

Change subject: soc/intel/tigerlake: Configure L1Substates for PCH Root ports
......................................................................

Patch Set 4:

(1 comment)

https://review.coreboot.org/c/coreboot/+/39412/4/src/soc/intel/tigerlake/fsp... 
File src/soc/intel/tigerlake/fsp_params_tgl.c:

https://review.coreboot.org/c/coreboot/+/39412/4/src/soc/intel/tigerlake/fsp... 
PS4, Line 137: 		params->PcieRpL1Substates[i] = get_l1_substate_control(config->PcieRpL1Substates[i]);
line over 96 characters