Change in coreboot[master]: soc/intel/tigerlake: Configure L1Substates for PCH Root ports

Show replies by date

257
days inactive
260
days old

coreboot-gerrit@coreboot.org

Manage subscription

33 comments
8 participants

Add to favorites Remove from favorites

tags (0)
participants (8)
  • Angel Pons (Code Review)
  • build bot (Jenkins) (Code Review)
  • Caveh Jalali (Code Review)
  • Furquan Shaikh (Code Review)
  • Nick Vaccaro (Code Review)
  • Patrick Georgi (Code Review)
  • Srinidhi N Kaushik (Code Review)
  • Wonkyu Kim (Code Review)