Máté Kukri has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43087 )
Change subject: Added GBYT4 port ......................................................................
Patch Set 1:
(5 comments)
https://review.coreboot.org/c/coreboot/+/43087/1/src/mainboard/unk/gbyt4/acp... File src/mainboard/unk/gbyt4/acpi/mainboard.asl:
https://review.coreboot.org/c/coreboot/+/43087/1/src/mainboard/unk/gbyt4/acp... PS1, Line 3: Scope (_SB.PCI0.LPEA)
This is for LPE audio, if the board doesn't have any audio support, then I'd drop it
I can delete the GpioInt lines but the ResourceTemplate needs to remain otherwise it doesn't build.
https://review.coreboot.org/c/coreboot/+/43087/1/src/mainboard/unk/gbyt4/cmo... File src/mainboard/unk/gbyt4/cmos.layout:
https://review.coreboot.org/c/coreboot/+/43087/1/src/mainboard/unk/gbyt4/cmo... PS1, Line 12: #96 4 r 0 status_c_rsvd
You can drop all commented-out entries. They can only bitrot 😄 […]
I will drop them. And they also should be dropped from google/rambi and many other boards with the exact same file copy pasted.
https://review.coreboot.org/c/coreboot/+/43087/1/src/mainboard/unk/gbyt4/cmo... PS1, Line 55: # SandyBridge MRC Scrambler Seed values : 896 32 r 0 mrc_scrambler_seed : 928 32 r 0 mrc_scrambler_seed_s3
Not Sandy Bridge
Should it be renamed to BayTrail or dropped entirely?
https://review.coreboot.org/c/coreboot/+/43087/1/src/mainboard/unk/gbyt4/dev... File src/mainboard/unk/gbyt4/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/43087/1/src/mainboard/unk/gbyt4/dev... PS1, Line 12: 0x1
I see there's only one SATA port, but I'm fairly sure the mPCIe slot is actually mSATA (Bay Trail on […]
I will change it to 3, just the comment i copied along with the base device tree from rambi (incorrectly) suggested that it meant two.
https://review.coreboot.org/c/coreboot/+/43087/1/src/mainboard/unk/gbyt4/dev... PS1, Line 69: off
on […]
From the data sheet it looks like it's a different SPI controller not the same as the flashchip is on (e.g. SIO SPI vs PCU SPI).