[coreboot-gerrit] Change in coreboot[master]: soc/intel/jasperlake: Remove DDI A lane programming

[Ronak Kanabar (Code Review)]

Hello V Sowmya, build bot (Jenkins), Furquan Shaikh, Maulik V Vaghela, Subrata Banik, Aamir Bohra, Patrick Rudolph, Karthik Ramasubramanian,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/40038

to look at the new patch set (#2).

Change subject: soc/intel/jasperlake: Remove DDI A lane programming
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soc/intel/jasperlake: Remove DDI A lane programming

For newer Intel graphics (>=11), the DDI port max lanes default to 4.
And kernel driver no longer relies on coreboot to provide information
via DDI_BUF_CTL_A (for DDI port A) register programming. Hence removing
this code.

BUG=b:150788968
BRANCH=None
TEST=checked jslrvp compilation and boot.
Change-Id: I4c171ec6a57d6fc53bee88420bfb3c0fbc5dc057
Signed-off-by: Ronak Kanabar 
---
M src/soc/intel/jasperlake/graphics.c
1 file changed, 0 insertions(+), 19 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/40038/2