Ronak Kanabar uploaded patch set #2 to this change.

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soc/intel/jasperlake: Remove DDI A lane programming

For newer Intel graphics (>=11), the DDI port max lanes default to 4.
And kernel driver no longer relies on coreboot to provide information
via DDI_BUF_CTL_A (for DDI port A) register programming. Hence removing
this code.

BUG=b:150788968
BRANCH=None
TEST=checked jslrvp compilation and boot.
Change-Id: I4c171ec6a57d6fc53bee88420bfb3c0fbc5dc057
Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com>
---
M src/soc/intel/jasperlake/graphics.c
1 file changed, 0 insertions(+), 19 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/40038/2

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I4c171ec6a57d6fc53bee88420bfb3c0fbc5dc057
Gerrit-Change-Number: 40038
Gerrit-PatchSet: 2
Gerrit-Owner: Ronak Kanabar <ronak.kanabar@intel.com>
Gerrit-Reviewer: Aamir Bohra <aamir.bohra@intel.com>
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