[coreboot-gerrit] Change in coreboot[master]: mb/purism/librem_cnl: Use FMAP-based SPD cache

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48549 )

Change subject: mb/purism/librem_cnl: Use FMAP-based SPD cache
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Patch Set 3: Code-Review+2

(1 comment)

https://review.coreboot.org/c/coreboot/+/48549/2/src/mainboard/purism/librem... 
File src/mainboard/purism/librem_cnl/romstage.c:

https://review.coreboot.org/c/coreboot/+/48549/2/src/mainboard/purism/librem... 
PS2, Line 104: 	cannonlake_memcfg_init(mem_cfg, &memcfg);
> the SPD addressing is different when using coreboot to read the SPD via smbus vs FSP, so that alone  […]

It would need to be thought. Anyway, no reason to block this change.