[coreboot-gerrit] Change in coreboot[master]: [WIP]cpu/x86/mtrr: Add helper function to cache cbmem in romstage

[Arthur Heymans (Code Review)]

Hello build bot (Jenkins), Patrick Georgi, Martin Roth,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/37199

to look at the new patch set (#3).

Change subject: [WIP]cpu/x86/mtrr: Add helper function to cache cbmem in romstage
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[WIP]cpu/x86/mtrr: Add helper function to cache cbmem in romstage

Romstage has some operations on cbmem and external stage cache.
In most circumstances this memory is set up as UC, so to speed
up these operations like decompressing postcar, this has to be
set up as WB.

Note: This should only be attempted on platforms where some form
of non eviction mode is used to guarantee not blowing up CAR.

TODO: The size that should be cached below cbmem top should be aligned
across platforms.

Change-Id: Ic0bc487a11cd0f5c489383364c729547031beccc
Signed-off-by: Arthur Heymans 
---
M src/cpu/x86/mtrr/Makefile.inc
A src/cpu/x86/mtrr/cbmem_cache.c
M src/include/cpu/x86/mtrr.h
3 files changed, 91 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/37199/3