Attention is currently required from: Iru Cai. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46832 )
Change subject: autoport: Add Broadwell SoC support ......................................................................
Patch Set 10:
(1 comment)
File util/autoport/wildcatpoint.go:
https://review.coreboot.org/c/coreboot/+/46832/comment/43ebe892_921fa314 PS9, Line 237: "pcie_port_coalesce": "1",
I see many boards set this.
Coalescing is only needed if PCIe root port 1 (function 0) is disabled. The PCI spec (I don't remember which) requires that function 0 of a multi-function device be present, so Intel southbridges/PCHs have a mechanism to change root port function numbers. On WPT-LP and earlier, the RPFN (Root Port Function Number) register controls this.
I don't think autoport knows about coalescing. When vendor firmware uses coalescing, autoport enables the wrong PCIe root ports.
I'd enable coalescing when the RPFN register differs from its reset default value, and also tell the user to double-check the PCH PCIe root ports. Or even (pretty-)print the RPFN value, which one can use to manually fix up the devicetree?