Hello Taniya Das,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/45198
to review the following change.
Change subject: sc7180: clock: Remove unwanted QUPv3 Frequency ......................................................................
sc7180: clock: Remove unwanted QUPv3 Frequency
As the UART clock frequency is no longer required by the UART driver, remove the unwated frequency.
Tested: Compile and boot up testing.
Change-Id: I137682b3ca45481ad34ac8ddb5cd308444f752a7 Signed-off-by: Taniya Das tdas@codeaurora.org Signed-off-by: Ravi Kumar Bokka rbokka@codeaurora.org --- M src/soc/qualcomm/sc7180/clock.c M src/soc/qualcomm/sc7180/include/soc/clock.h 2 files changed, 0 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/45198/1
diff --git a/src/soc/qualcomm/sc7180/clock.c b/src/soc/qualcomm/sc7180/clock.c index 3702fa6..919735d 100644 --- a/src/soc/qualcomm/sc7180/clock.c +++ b/src/soc/qualcomm/sc7180/clock.c @@ -12,14 +12,6 @@
struct clock_config qup_cfg[] = { { - .hz = QUPV3_UART_SRC_HZ, - .src = SRC_GPLL0_EVEN_300MHZ, - .div = DIV(1), - .m = 384, - .n = 15625, - .d_2 = 15625, - }, - { .hz = SRC_XO_HZ, /* 19.2KHz */ .src = SRC_XO_19_2MHZ, .div = DIV(1), diff --git a/src/soc/qualcomm/sc7180/include/soc/clock.h b/src/soc/qualcomm/sc7180/include/soc/clock.h index c9ecfb2..62e2a34 100644 --- a/src/soc/qualcomm/sc7180/include/soc/clock.h +++ b/src/soc/qualcomm/sc7180/include/soc/clock.h @@ -20,7 +20,6 @@ #define SRC_XO_HZ (19200 * KHz) #define GPLL0_EVEN_HZ (300 * MHz) #define GPLL0_MAIN_HZ (600 * MHz) -#define QUPV3_UART_SRC_HZ 7372800
#define SRC_XO_19_2MHZ 0 #define SRC_GPLL0_MAIN_600MHZ 1