[coreboot-gerrit] Change in coreboot[master]: cpu/intel/model_6xx: Update ucode before enabling cache

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44239 )

Change subject: cpu/intel/model_6xx: Update ucode before enabling cache
......................................................................

cpu/intel/model_6xx: Update ucode before enabling cache

Other similar CPUs update the microcode first, so do the same here.

Change-Id: I66f197cc8cf10eac2815961043e8c343aa3c204d
Signed-off-by: Angel Pons 
---
M src/cpu/intel/model_6xx/model_6xx_init.c
1 file changed, 3 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/44239/1

diff --git a/src/cpu/intel/model_6xx/model_6xx_init.c b/src/cpu/intel/model_6xx/model_6xx_init.c
index a6944d3..f394b5f 100644
--- a/src/cpu/intel/model_6xx/model_6xx_init.c
+++ b/src/cpu/intel/model_6xx/model_6xx_init.c
@@ -9,14 +9,14 @@

static void model_6xx_init(struct device *dev)
 {
+	/* Update the microcode */
+	intel_update_microcode_from_cbfs();
+
    /* Turn on caching if we haven't already */
    x86_enable_cache();
    x86_setup_mtrrs();
    x86_mtrr_check();

-	/* Update the microcode */
-	intel_update_microcode_from_cbfs();
-
    /* Enable the local CPU APICs */
    setup_lapic();
 };