Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35523 )
Change subject: mb/acer: Add Acer Aspire VN7-572G
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Patch Set 120:
(2 comments)
Thank you for your quick reactions.
https://review.coreboot.org/c/coreboot/+/35523/119/src/mainboard/acer/aspire...
File src/mainboard/acer/aspire_vn7_572g/Kconfig:
https://review.coreboot.org/c/coreboot/+/35523/119/src/mainboard/acer/aspire...
PS119, Line 75: #config TPM_PIRQ
: # hex
: # default 0x1e # GPP_A6_IRQ
The schematics specify a Nuvoton NPCT650 appearing on the LPC bus. […]
Please add this as a comment above it.
https://review.coreboot.org/c/coreboot/+/35523/62/src/mainboard/acer/aspire_...
File src/mainboard/acer/aspire_vn7_572g/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/35523/62/src/mainboard/acer/aspire_...
PS62, Line 58: 2
I resolved this by enabling "SataPwrOptEnable"
Can you document that in the commit message please?
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Gerrit-Project: coreboot
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