Jonathan Kollasch has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38346 )
Change subject: mainboard: add Supermicro X9SCL/X9SCM
......................................................................
Patch Set 11:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38346/2/src/mainboard/supermicro/x9...
File src/mainboard/supermicro/x9scl/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/38346/2/src/mainboard/supermicro/x9...
PS2, Line 41: off
Any updates?
The firmware running on the ME appears to be SPS. The Supermicro UEFI/BIOS has hidden the ME PCI device by the time the OS is running. The visibility of the device does not appear to make any functional difference to romstage or ramstage code.
--
To view, visit
https://review.coreboot.org/c/coreboot/+/38346
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I985db89d67de21bbafbdc34d7044496434a6eb17
Gerrit-Change-Number: 38346
Gerrit-PatchSet: 11
Gerrit-Owner: Jonathan Kollasch
jakllsch@kollasch.net
Gerrit-Reviewer: Angel Pons
th3fanbus@gmail.com
Gerrit-Reviewer: Jonathan Kollasch
jakllsch@kollasch.net
Gerrit-Reviewer: Martin Roth
martinroth@google.com
Gerrit-Reviewer: Patrick Georgi
pgeorgi@google.com
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-CC: Paul Menzel
paulepanter@users.sourceforge.net
Gerrit-Comment-Date: Fri, 10 Apr 2020 18:24:51 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Jonathan Kollasch
jakllsch@kollasch.net
Comment-In-Reply-To: Angel Pons
th3fanbus@gmail.com
Gerrit-MessageType: comment